2025-02-24 6:57 AM - edited 2025-02-24 7:26 AM
Hi All!
I have an application where I am designing a PCB for an STM32 MCU. However it requires a faster ADC than the integrated one. I am thinking about using the AD9057 by analog devices, using parallel interface. I want to ideally read as fast as possible each sample, and transfer data to memory using DMA. My question then is, what is the fastest/most elegant way of doing this, and what is the easiest way of doing this? Could one for example use PA0 to PA7 as GPIO inputs and read them simultaneously and transfer the data using DMA or CPU at 20 MSPS? Is is fast enough? I am open to any suggestions! I would love examples too!
Could one use FMC? How would one configure it?
Best regards
NOTE: I am trying to avoid using FPGA
Solved! Go to Solution.
2025-03-06 1:46 AM
My solution was to go for a newer ADC such as the single channel ADC3908S02
Combining it with an STM32H723ZG (144 pin) using the PSSI (Parallel synchronized slave interface).
Since I cant see any case of DDR, I went for the single channel ADC, even though the dual channel would be beneficial and add more features using the differential clocks.
2025-03-05 3:08 AM - edited 2025-03-05 4:32 AM
Hi @elso ,
For your application, it is recommended to use the FMC (Flexible Memory Controller) if the AD9057 interface allows it. This controller enables efficient and fast reading of ADC data without overloading the CPU. In conjunction with DMA, it can transfer ADC data directly to memory without CPU intervention, allowing for high transfer rates and minimized latency. However, you can't use another external memory because there is no chip select on the package. If you plan to use the GPIOs, you should test them first because, to my knowledge, the GPIOs on the STM32H7 are generally slow.
This article and the application note AN4570 can help you to configure the FMC.
Thank you.
ELABI.1
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2025-03-05 4:16 AM
As I understand from glancing over the ADC datasheet, there is no "ready" output or something similiar.
You have to trigger the sampling cycle with a rising edge on ENCODE, and synchronize the readback with this signal.
I would generate the ENCODE signal toggle from a timer interrupt, and manage the ADC read from within the same interrupt. Using sequential GPIO pins directly seems simpler to me than FMC. Just take care the IO speed settings are appropriate, I think default is the slowest setting.
And I would cross-check with other required functionality first, and consider options wher to break them out. At least on many M3 / M4 MCUs, the lower ports (PAn, PBn, PCn) use to provide more peripheral options, so I would go for higher port numbers (PH, PI, etc.).
2025-03-05 5:57 AM
Could I use an older version like an STM32H723ZG ant utilize the PSSI interface with a more modern ADC?
2025-03-06 1:46 AM
My solution was to go for a newer ADC such as the single channel ADC3908S02
Combining it with an STM32H723ZG (144 pin) using the PSSI (Parallel synchronized slave interface).
Since I cant see any case of DDR, I went for the single channel ADC, even though the dual channel would be beneficial and add more features using the differential clocks.
2025-03-06 3:01 AM
> Since I cant see any case of DDR, I went for the single channel ADC, even though the dual channel would be beneficial and add more features using the differential clocks.
Dual / multi-channel ADCs would have been to read out sequentially.
But you could operate two ADC in parallel, sharing the control signals and with different data pins.