STM32 MCUs products

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New possibilities for the ultra-low power segment!

STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...

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Hello, I am new to STM32 and I am trying to generate PWM signal of 10 KHZ and 50% duty cycle and i am not able to achive it and I am using STM32L476VG DISCO board and for reference I have attached the code. Thank you

/*CODE to generate PWM signal of 50%*/#include "stm32l476xx.h"#include "pwm.h"void pwm_init(void){ /*RCC configuration*/ RCC->AHB2ENR|=RCC_AHB2ENR_GPIOEEN;//ENABLE GPIOE RCC->APB2ENR|=RCC_APB2ENR_TIM1EN;// ENABLE CLOCK ACCESS TO TIM1 //RCC->APB1ENR1|...

PKuma.23 by Associate II
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Resolved! I need to use PG10-NRST as a GPIO. So I check the Reference manual to find out how to do it. I find that it can be done if I modify the field NRST_MODE to 2 and I really do this. But it doesn't work.The mcu still reset when PG10-NRST comes a low level.

Here is my code in main() to config field NRST_MODE: HAL_FLASH_Unlock(); HAL_FLASH_OB_Unlock(); gFlashOBST.OptionType = OPTIONBYTE_USER; gFlashOBST.USERType  = OB_USER_NRST_MODE; gFlashOBST.USERConfig = FLASH_OPTR_NRST_MODE_1; HAL_FLASHEx_OBProgram(&...

fhu.11 by Associate II
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FDCAN2 4 times slower than FDCAN1 on STM32G491

I was finally able to find the correct settings to configure my CAN peripherals with correct bitrate after tweaking for a while in STM32CubeMX. The settings that work do not make sense. FDCAN2 is 4 times slower so I had to make clock divider for FDCA...

Resolved! PWM Output Not Generating Waveform for STM32F429ZI

Hi everyone, I'm just trying to test and verify some clock frequencies for a PWM waveform are correct. I used CubeMX to generate some code that has set the clock frequency of the MCU to 72 mHz and I am trying to achieve a 20 kHz PWM frequency. I enab...

EGold.3 by Associate II
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Sharable D1 SRAMs in the more recent H7 chips

As per RM0468, STM32H72x and STM32H73x chips have 192 KB of SRAM in the D1 domain that is 'sharable' between ITCM and AXI SRAM, ie. it can be allocated as ITCM or AXI SRAM with 64KB granularity,It is known that SRAMs in D1 (or any other domain for th...

HWidj.2 by Associate III
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How to use arm_rfft_q15 properly.

I created a 10Hz sine function with phase of pi/4, amplitude of 1000, bias of 2000, a sampling rate of 1kHz, and 2048 samples (20 periods in total) and saved it into q15_t input[2048].I created a fft stract by arm_rfft_init_q15(&S, 2048, 0, 0)I enter...

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RBen-.1 by Associate
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