Reconfigure the synchronized timers

[kyouma001]

Hi, I'm using STM32F407 development board. I synchronized TIM2 as master and TIM5 as slave. Timer initialization functions:

void TIM2Config (void)
{
	//	1. Enable the TIM2 clock
	RCC->APB1ENR 	|=	RCC_APB1ENR_TIM2EN;
	
	//	2. Set clock coeff. as 2, enable auto-reload preload
	TIM2->CR1		= 	TIM_CR1_CEN;
	
	TIM2->CR2		=	TIM_CR2_MMS_1 | TIM_CR2_MMS_0;
	//TIM2->CR2		=	TIM_CR2_MMS_2;
	TIM2->SMCR		=	TIM_SMCR_MSM;
	
	TIM2->CNT		=	(uint32_t) 0;
	TIM2->PSC		=	(uint32_t) 1-1;
	TIM2->ARR		= 	(uint32_t) 84000-1;
	TIM2->CCR1		= 	(uint32_t) 16800-1;
	TIM2->RCR		= 	(uint32_t) 0;
	
	TIM2->CCMR1		=	TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1;
	TIM2->CCER		=	TIM_CCER_CC1E;
	
	TIM2->DIER		|= 	TIM_DIER_UIE;
	NVIC_EnableIRQ(TIM2_IRQn);
}

void TIM5Config (void)
{
	//	1. Enable the TIM5 clock
	RCC->APB1ENR 	|=	RCC_APB1ENR_TIM5EN;
	
	//	2. Set clock coeff. as 2, enable auto-reload preload
	TIM5->SMCR		=	TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | 0UL << 4 | 0UL << 5| 0UL <<6;
	
	TIM5->CNT		=	(uint32_t) 0;
	TIM5->PSC		=	(uint32_t) 1-1;
	TIM5->ARR		= 	(uint32_t) 84000-1;
	TIM5->CCR1		= 	(uint32_t) 8400-1;
	TIM5->RCR		= 	(uint32_t) 0;
	
	TIM5->CCMR1		=	TIM_CCMR1_OC1PE | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1;
	TIM5->CCER		=	TIM_CCER_CC1E;// | TIM_CCER_CC1P;
	
	TIM5->DIER		|= 	TIM_DIER_UIE;
	NVIC_EnableIRQ(TIM5_IRQn);
}

As a result it seems they synchronized as desired (Red channel is TIM2 and blue channel is TIM5):

 

My problem is the synchronization is break down when I try to reset, restart or reconfigure the TIM2. I use a button to reconfigure the TIM2:

if (get_state(button))
		{
			GPIOD->BSRR|= GPIO_BSRR_BS15;
			TIM2->CR1	&= 	~(TIM_CR1_CEN);
			TIM2->CCR1	+= (uint32_t) (TIM2->ARR)/20;	// +%5 Duty
			TIM2->CR1	|= 	TIM_CR1_CEN;
			//TIM5->CR1	&= ~(TIM_CR1_CEN);
			//TIM5->CNT	= 0;
			delayMs (100);
		} 
		else
		{
			GPIOD->BSRR	|= GPIO_BSRR_BR15;
			delayMs (100);
		}

This button function can disenable, restart TIM2 or increase the duty cycle. But TIM5 does not follow this configuration and synchronization breaks down. I've tried to toggle CEN bit of TIM5 and reset the CNT register but as shown below TIM5 does not follow the master.

What should I do to cover this synchronization? Where is my fault? Thanks in advance.

[waclawek.jan · Accepted solution]

You don't need to stop TIM2 when changing duty cycle. However, you may want to enable CCRx preload by setting TIM2_CCMRx.OCxPE.

If you want to disable TIM2, you have to manually disable TIM5, too. To start again, it's then enough to enable the master (TIM2).

An intereting alternative might be to set TIM5 to One-Pulse Mode (by setting TIM5_CR1.OPM).

JW