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Forum Posts

I2C slave address masks interferes with slave addresses 0-7

Unfortunately, I cannot post any code for this question but I believe it relates more to the HAL library and the i2c address matching hardware of the STM32 microcontrollers.I am working on emulating multiple I2C slaves in the address range of 1-24 on...

j.f303k8 by Associate II
  • 1840 Views
  • 1 replies
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Resolved! CAN transceiver on stm32f407 discovery

Hello dear friends,It's been a week since I worked on the CAN transceiver and couldn't make it work. I have set up the chip rcc, bit rate, and receive interrupt of CAN, set the receive filter, and the receiver id in transmission, with no success. I h...

STM32F030F4Px USART problem

i'm using STM32F030F4Px for MODBUS Master Slave communication based on USART (RS485 communication). i'm using 9600 baud rate, 8bit 1 stop bit communication with DMA and HAL. Master is transmitting 8 bytes to slave after 10 or 20 msec which are receiv...

NSing.5 by Senior
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  • 7 replies
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Resolved! STM32L4 : Using a part of QSPI external Flash Memory as a frequently updated data log, accessible by a PC with USB MSC (Faisability demand)

Hello everyone,I'm working on a STM32L4 project which embeds a QSPI external Flash Memory (not yet sourced but doesn't matter).This QSPI Flash Memory would be splitted into 2 parts, one for TouchGFX Images and one for 10MB Filesystem. This FS will ha...

MLair.1 by Associate III
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  • 8 replies
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SKDutt by Associate
  • 707 Views
  • 3 replies
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Bugs in STM32G4, RM0440 Rev 7 for FDCAN

Bugs in STM32G4, RM0440 Rev 7 for FDCAN:1)STM32G4, RM0440 Rev 7  44.3.3 Message RAM.It is written on the page 1953:"In case of multiple instances the RAM start address for the FDCANn is computed by endaddress + 4 of FDCANn-1, and the FDCANn end addre...

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AVasi.11 by Associate II
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  • 3 replies
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