STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...
Using something like STLink util or newer, command line software: Can one identify which type of STM32 MCU is connected? E.g. for use in further scripts. It doesn't help if I see it on a GUI somewhere.
Hello Support Team,Please find the below issue description along with the attached code. Please suggest how we can fix this issue. I have developed the SPI with DMA code for STM32H745-DISC (Discovery board). I have flashed master code on the first bo...
For my application I'm using a comparator and i have set a reference voltage(threshold) for that and my application is that, if the current passes through the threshold then my comparator output should be turn on(1 or 0). I have set the comparator ou...
I'm trying to implement SPI Full Duplex communication in NUCLEO-H745ZI-Q board by configuring CM7 as Master & CM4 as slave. I used the function HAL_SPI_TransmitReceive() in both the cores but could not get the expected result.I tried to debug and fou...
Hello!I'm receiving data in UART Rx with DMA and I need to make it inmunne to disconnections. Now, sometimes I can recover the communication after a disconnection, but I need it always.Using the debugger I realized that huart1.ErrorCode change its va...
After initializing the project, I freeze waiting for the presence of data of type 0x04 in the list in function Sensor_DeviceInit() - app_bluenrg_2.c. Please tell me what could be wrong?
Regarding LL_AHB1_GRP1_EnableClock, after setting bit in the function, it is read to "tmprg" and cast to void type. What is the reason for reading?__STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs){ __IO uint32_t tmpreg; SET_BIT(RCC->AHB...
Hello,I’m using STMCUBE Version: 1.9.0 with STM32h750 chip.1. I would like to know to convert intel hex file to a binary file with multiple section addresses? We like to prevent a scenario in that intel hex sections are not sequential, and the bina...
I would need assistance in editing the linker script and the startup (.s) file to access the memory area from a c routine...