Hi,I'm trying to get a clock output at 460.9 Khz on PB2 by setting the MCO2.The PB2 pin is declared as follow:static void MX_GPIO_Init(void){ GPIO_InitTypeDef GPIO_InitStruct = {0}; /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOB_CLK_ENABLE(); /*Config...
void External_Clock_Config(){ TIM_ICInitTypeDef TIM_ICInitStructure; TIM_OCInitTypeDef TIM_OCInitStructure; NVIC_InitTypeDef NVIC_InitStructure; GPIO_InitTypeDef GPIO_InitStructure; RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE); /...
Hi ,We have SEGGER J-TRACEpro for CORTEX-M processors . https://shop-us.segger.com/product/j-trace-pro-cortex-m-8-18-00/ We want to take the Code Coverage report . We are using Ozone IDE and loading the .OUT file to the OZONE IDE .There are 2 cables ...
Hey, I´m working on implementing all 3 CAN bus interfaces on a F767ZI. Looking through the Reference Manual it states that dual CAN set ups feature 28 filter banks and single CAN set ups feature 14 filter banks. However looking at Table 280 it states...
When data size equal to 3 rx buffer last element is true only others are not. I expected all of them is true data. Why it is working like that ? I examine the result on debug modestatic void Init_SPI2(void) { SPI_InitTypeDef SPI_InitStructure; ...
If someone has that information please share, better would be if you can point me to the documentation where I can found the information. We are using the STM32F429ZI nucleo board.
Hello,I’m using STM32L412RB.I'm trying to differentiate between the types of chargersWhen the charger is connected, reboot occurs, and I run HAL_PCDEx_ActivateBCD()/HAL_PCDEx_BCD_VBUSDetect() in MX_USB_DEVICE_Init().After that, in case of abnormalit...
Hi,I am using the STM32L082 and looking for ways to have a watchdog implemented.However during long periods of low power sleeps (e.g. 12 hours) I would like to freeze the IWDG downcounter.Is this possible for the STM32L082? Thanks
Hello dear! I'm developing a new product. I would like use the STM32 F1 series, but I was surprised with this: https://blog.zapb.de/stm32f1-exceptional-failure/The F1 Series don't have RDP Level 2 protection, in this case, what's the most security wa...
Datasheet : DS13737Datasheet - STM32U585xx - Ultra-low-power Arm<Sup>®</Sup> Cortex<Sup>®</Sup>-M33 32-bit MCU+TrustZone<Sup>®</Sup>+FPU, 240 DMIPS, up to 2 MB Flash memory, 786 KB SRAM, cryptoReference Manual : RM0456
