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I am using a Nucleo-N657X0-Q board to prototype a data collection system that collects samples from an ADC connected to the SAI peripheral and places the results in RAM. If I use CPU AXI RAM0 as the destination this works correctly, but if I change t...
In my embedded software project, I need to write a bootloader. I wrote an application code for the bootloader and testing, and everything is fine so far, but the delay function in the application code is not working. I think the reason for this is th...
Hello ST experts,I have a weird experience with UART communication between two STM32G4 microcontrollers. MCU1 sends 10 bytes to MCU2 via UART. Both UARTS are configured with 9600 Baud rate with DMA in circular mode. The Problem arises when the MCU1 i...
Hello, I want to design a PCB with STM32H743VIT6 MCU. But I am not sure how can I choose crystal and capacitors properly. In STM32H743VIT6 datasheet there is one section about this topic;according to this information should I take the Cstray value as...
Hello,I have not found the maximum TRACECLK frequency of the STM32H725 in the documentation. It looks like it is generated by PLL1 with flexible division ratios and thus can attain values that are not realistic for I/Os (100 to 220 MHz for Speed 11 a...
I have seen that it takes about 28 ticks to read registers, so I think my stm32h750 runs really at 17Mhz, it seems is not risk, so perhaps it exists another more fast stm32 micro that have more 17 MIPS
This is a pretty basic question but I would like a bit of clarity if possible.If a GPIO pin is configured for the fsbl code can it also be used in the Appli code?If so how would you go about defining it in the Appli code? There doesn't seem to be an ...
Hello, I’m working with an STM32H723 MCU and have a question about Flash behavior when caches are enabled.Both D-Cache and I-Cache are enabled, and I’m not using any additional MPU configuration. I'm using D-Cache invalidate after a Flash erase opera...
Our company has a chip that outputs data via DCMI, though it does not employ a standard DCMI interface. It lacks a horizontal synchronisation signal, possessing only a vertical synchronisation signal. Could you advise which chips are capable of recei...
Hello Expert, Could you please provide guidance on the issue below? We are using the following setup:- MCU: STM32G0B1CCTx- Software: X-CUBE-TCPP 4.2.0 with USBPD Application 4.2.0 Dual Role- Board Part: TCPP0203 v1.2.3 We are developing a USB PD boa...
