STM32 MCUs Products

Ask questions, find answers, and share insights on STM32 products and their technical features.

cancel
Showing results for 
Search instead for 
Did you mean: 

Forum Posts

Resolved! Brick your STM32H735 in one easy step!

We're bringing up yet another custom board with the STM32H735 as the core processor. Built the first one, handed it to the software guy, and a few minutes later he says it's broken. Won't program, won't go to DFU mode, nothing. "You must have zapped ...

MForb1_0-1729044612944.png
MForb.1 by Associate II
  • 2554 Views
  • 9 replies
  • 5 kudos

48 bit SPI implementation

Hi there,I'm attempting to use an STM32 U5 device to interface with another device over SPI, and am trying to do it using 48 bit SPI frames supported by this device.An illustration of what I'm trying to accomplish is below, the key is to be able to t...

48bit adis.png
HKK by Visitor
  • 36 Views
  • 1 replies
  • 0 kudos

does stm32G0 need an external clock for USB PD

 Where using aSTM32G081EBY6TR25-pin wlcsp - packageThis part doesn't seem to have pins for a external clock pins.  Just making sure that the internal clock is sufficient to handle USB-PD.  It say's that 6 to 18mhz is fine, but really its looking for ...

Screenshot 2026-01-20 at 5.20.24 PM.png

Resolved! Comparator Bug Report on STM32G0

I have configured the comparator 2 PB6 on the STM32G071RB Nucleo board. It is configured for rising edge interrupt.  As soon as HAL_COMP_Start is called on the COMP you can see the EXTI rising edge interrupt flag immediately go high. (well not immedi...

Carl_G_1-1737394247861.png
Carl_G by Senior III
  • 1605 Views
  • 10 replies
  • 3 kudos

800 x 800 Display with STM32U5G9VJT6Q - possible?

Hi,we are trying to get a 800x800 display to work with the STM32U5G9VJT6Q, using either RGB888 or RGB565 in Video Mode (Burst).According to what we read it is definitely possible. Did we miss something?Could someone please confirm that is definitely ...

Ricko by Senior III
  • 3190 Views
  • 30 replies
  • 16 kudos

'U5 SBus-via-DCACHE1 connectivity

Is this connection real?I don't think so. DCACHE implementation subchapter says:The DCACHE1 is placed on Cortex®-M33 S-AHB bus, and caches only the external RAMmemory region (OCTOSPI, HSPI, and FMC), in the address range [0x6000 0000:0xAFFFFFFF] of t...

waclawekjan_0-1768924913136.png