PCB design with stm32h7 series (144 pin)

[Ironman]

According to some reference it is good to have ground polygon under IC

1. Is it okay to have ground polygon under IC? 

2. Does it effects heating issue?

3. I saw two hole behind the IC of nucleo 144 board. What that mean? 

[STOne-32]

Dear @Ironman ,

we do not have an exposed pad for this MCU and package , there is not real interest to have Ground polygon under the package . It will make your routing of other signals more complex . However this is interesting for segregation of Analog routing versus Digital high speed signals if applied close to that blocs .

regards,

STOne-32.

[Ironman]

look at this, this is none exposure gnd polygons with gnd vias. You mean no need to add this polygons right?

[STOne-32]

Dear @Ironman ,

yes, I confirm no real need , but it is good technique to have ground vias to other layers on PCB.

regards,

STOne-32.

[Harvey White · Accepted solution]

My designs are complex enough that I want to use 4 layer boards.  Top, ground plane, inner routing, and bottom routing,   On the top and bottom layer, I can use a polygon fill for VCC, which helps with current carrying capacity (some) and adds more stability.  

I have, and can use 2 layer boards but that is on a board that is not densely packedd.  Say an L5 design with 100 pin packages and not a full load of peripherals.

No reason not to use a ground plane under the chip, but it will make routing more difficult.

Hope this helps

[Ironman]

I am using 4 layer stack

1. Top layer

2. GND 1

3. GND 2

4. Bottom Layer

But I got your point . Thank you

[Harvey White]

Ok, curious why you use two ground layers.  If they are the same ground (not analog vs. digital), then you might consider changing one to a VCC distribution layer, which is done on 6 layer boards, IIRC.  It might simplify your design.  Of course, you can always run power distribution other than VCC on the top or bottom layer.

I generally want the GND plane to be uninterrupted, so I use a fill on the whole layer and prohibit the autorouter from putting traces on it.  I'd do the same for the VCC plane if I were using one.

My designs are complicated enough, U575 processor, QSPI memory, S1D13517 graphics chip, console and I2C interfaces, on board point of use power, micro sd card, PCA9634 LED controller, all in a stacking configuration.  I need that third layer for more wires.

Thanks