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Suddenly the CPU has started to absorb 160 mA. At the beginning, when I started using it, it was 30 mA. I cannot understand the reason. No hardware modification has been operated. Has anybody experienced anything like this? Thanks in advance.@apoggia...
Hi is it possible to communicate 32 bit data over the SPI bus? Using IOC to set up the SPI port 2 , I seem to be limited to 16 bits.Thanks a lot Richard
Hi,I have a bootloader used 3 years ago on 2020 on STM32F437 and it works perfectly.This year, I am trying to use the same bootloader on STM32F205 but got problem that after the jump, the Application is not running.After a long time debugging I found...
Hi, I am new to work on STM32F0RB discovery board to get update the FW through UART/USB port. If any one have the idea to work on this please give me the solution. Thanks, Shashi Shekhar
Hi community!I have a STM32H723VG and I use Timer1 on that device to generate complementary PWM Outputs (Chx + ChxN) on channel 1-3 plus a 1-channel PWM on Channel 4. When the PWM is not needed, I have to set the output pins of the timer either high ...
Hello ST Link Support Team,I hope this message finds you well. I am currently experiencing an issue with an STM32G474 controller that I've been using successfully for the past five months. However, after uploading a new firmware recently, I am unable...
Hello,I'm using an STM32C011 for a product we are developing, and I want to use ST's default System/OpenBootloader (via UART) that the virgin chips have on board. That way in production we don't have to download our custom bootloader, and we'll use t...
Is there a table of proper settings for the GPIO output type, pull up/down setting and speed of alternative functions ?
Hi, Sir: Currently using H563ZI (MB1404C) to develop programs.When VDD=3.3V, MCU works normallyWhen VDD=1.8V, the MCU functions abnormally (USB function fail), but the specification indicates that it can support VDD=1.8V. Where should I set this on t...
I try to setup CRS SYNC setup with LSE using the latest CubeMX.It appears that when CRS SYNC with Source LSE is selected, LSE does not get initialized unless RTC is active as well and its clock source is set to LSE. E.g crystal drive level option doe...
