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Hi all, i am trying to use MDMA to transfer data from a cyclic ADC-DMA buffermy ADC buffer is of x size and it is cyclic: adc_buffer[x]and i want to transfer its data via MDMA to a larger buffer while its samplingmeaning that after every ADC iteratio...
안녕.최근에 STM32H753XI를 사용하여 맞춤형 보드를 만들었습니다.보드의 초기 테스트를 위해 각 주변 장치에 대한 테스트를 실행하고 있습니다. 대부분의 경우 잘 작동하지만 SD 및 eMMC 사용에 문제가 있습니다.내 보드에는 SD 슬롯 1개와 eMMC가 포함되어 있습니다.eMMC는 SDMMC1에 연결되고 SD는 SDMMC2에 연결됩니다.그리고 둘 다 FatFS에 연결하여 파일 시스템으로 사용합니다.둘 다 각각 사용할 때 매우 잘 작동합니다...
This is more a bug report, not a question.Background:I want to use OCTALSPI as QuadSPI (QSPI), esp. with VDD set to 1V8. I want to get (at least) 30 MHz SCLK working on QSPI.But I cannot go faster as 12.195 MHz, which is associated with a OCTALSPI cl...
In Figure 1 of the reference manual RM0433 for the STM32H743 (and STM32H742, STM32H753, STM32H750) no connection between cache and DTCM-RAM exists. For all I know this is correct since the DTCM-RAM is not cachable.Table 7 on the other hand shows tha...
I am attempting to bring up a custom board using a STM32U5A9 chip. I modeled the board off of the STM32u5a9j-dk dev kit (the one with a circular screen). I've been able to get our LCD screen to work over DSI and touchGFX currently runs fine.Now I am ...
Unable to write in EEPROM AT24C256 This is the code I2C_HandleTypeDef hi2c1;#define EEPROM_I2C &hi2c1// EEPROM ADDRESS (8bits)#define EEPROM_ADDR 0xA0// Define the Page Size and number of pages#define PAGE_SIZE 64 // in Bytes#define PAGE_NUM 512...
Hi Since almost 10 years I'm working with STM32F103VF microcontroller with KEIL IDE, and I don't have any problem. But yesterday I received the last batch from my PCB manufacturer, and it installs that reference STM32F103VFT6 as always, but I can't ...
Hi, I've a problem with function HAL_UART_Transmit_IT.If I call this function with global data array, there isn't a problem, but If I call it with a non global data array, I receive wrong data.This is a sample code:void SendData() { uint8_t s[10]...
Hi Team,I have configured the I2C in Master Mode and Enabled LPDMA channel 2 and 3 respectively for I2C3Tx and I2C3Rx./* I2C3 DMA Init */ /* LPDMA1_REQUEST_I2C3_TX Init */ handle_LPDMA1_Channel2.Instance = LPDMA1_Channel2; handle_LPDMA1_Channel2.I...
HelloI am running a NUCLEO-H723ZG board.User data is saved to internal flash from within the application according to the following procedure: unlock the flash, erase, program. None of the operations return errors. When monitoring the memory, everyth...
