In my design, I want to drive a dac with octospi.I need to transmit data via the interface in DAC data frame without any instruction and address.like： *(__IO uint8_t*)&OCTOSPI1->DR = data[i]; void OCTOSPI1_Init(void) { OCTOSPI1->CR &= ~OCTOSPI_C...
Hi, I am using STM32L476 Nucleo board to generate and read some signals. I am using TIM3 to trigger TIM1 and generate pwm signals. I also used ADC in interleaved continious mode and everything worked out. What I want to do is that I want the ADC and ...
Hi I have a VERY large driver for a PSFB that unfortunately suffer from a flaw.The idea is that the master timer is reporgrammed with period and CMP1 CMP2 and CMP3 and that the timerD and timerE uses these 4 points for the crossbar. Everything works ...
HiI' am devloping an Hardware using STM32G491RET6 where I'm using many interfaces such as I2C, SPI, RTC, USB, RS232, ETH etc.The above hardwase is not yet fabricated, but we want to develp a software before the fabricated board arrive. Hence in order...
I'm trying to use the LCD screen in STM32N6570DK, but it has an error like this`Break at address "0x18003a1a" with no debug information available, or outside of program code.`. But when I tried to view the vector table generated by disassembly, It wi...
I made a stm32f411 simple test board and I am failing to do some things with it, now I am trying to send a string using the usb cdc, the code is uploaded but the device is not shown in usb list, I have a stm32f411 blackpill with 25mhz crystal hse(in ...
Hello,In my application I need to clear TIM 3 Counter on Rising Edge of an external Pin.My target MCU is STM32C011Is there any example available? ThanksAlfonso
in file stm32f767xx.h /* Bit definition for Ethernet PTP Time Stamp Status Register */#define ETH_PTPTSSR_TSTTR_Pos (5U) #define ETH_PTPTSSR_TSSO_Pos (4U) need replace to /* Bit definition for Ethernet PTP Time Stamp Status Register */#define ETH_...
Hi Everyone, I have W25Q256JV and STM32L562CEU6 with 38 Pin Package and have OSPI (Single SPI, Dual SPI and Quad SPI option only). Below is my Clock Settings, OSPI (Quad SPI) with Quad Lines Settings and Error Status during Write Enable and main.c fi...
Hi. We found a serious problem in the behavior of the memory bus pins during reset.Our design uses an STM32H743I CPU and non-volatile MRAM/FRAM memory connected via a bus. We use the FMC controller to access the memory, the bus pins are set up, and ...
