Ask questions, find answers, and share insights on STM32 products and their technical features.
Hello,I am using STM32 microcontrollers on CAN FD ISO buses.The problem is that I am not able to configure CAN FD bus with a nominal rate of 500kbps and a data rate of 1Mbps. All others configurations are working as expected, see below all combinatio...
What is the sequence and APIs to erase and program the Engineering bytes?There are APIs to handle Main flash, and APIs to handle OTP, but it is not clear how the Engineering bytes should be handled.Thanks
Greetings!I am using the STM32U031 with STM32CubeMX HAL as an SPI Slave and would like to receive data that has variable length (max 50 bytes). I am using software NSS and my current approach is to start a DMA Rx/Tx transfer (using HAL_SPI_TransmitRe...
We have a working production firmware for the STM32H7B3 that uses a Winbond W25Q01JVZEIM external flash using QSPI in memory-mapped mode to store data and assets for a TouchGFX and other applications.Now, due to internal flash limitations, we are att...
Hello, I am working on simple program to read ADC using the STM32u585QII microcontroller. I am using polling method in Scan mode on 4 channels. All set as 14 bit but understood the readin will be in 12 bit. The problem is the values I am getting are ...
When the MCU is placed in Standby Mode, where does the CPU begin to execute when exiting the mode? (for example, on an RTC event) Is it a reset or a return from interrupt? RM0394 isn't clear on this.
Hi all, I am trying to use FDCAN with Baud rate switch (500 kB / 2 MBit) activated and I want to send 64 Byte. Processor is STM32H7A3. Project was set up with CubeMX V. 6.11.1 and HAL FW_H7 V1.11.2. Clock for FDCAN is 80 MHz. The problem is that th...
What is the difference between STM32F411VEH6U and STM32F411VEH6? What does the suffix U mean?
STM32L072 – LPTIM1 external pulse counting with LSE in STOP mode not workingDescription:Hello,I am trying to configure LPTIM1 on an STM32L072 to count external pulses from a button connected to PB5 (LPTIM1_IN1). The goal is to keep counting pulses wh...
The VENC peripheral on the N6 boasts a hardware handshake path with the DCMIPP peripheral, potentially allowing full compression of each frame to occur with very little active RAM. From what I can find, the DCMIPP capture starts, then the VENC is tol...
