Hi for everyone,I try to implement window watchdog to my system. I got reset every single time during enabling watchdog in HAL_WWDG_Init() function and exactly WRITE_REG(hwwdg->Instance->CR, (WWDG_CR_WDGA | hwwdg->Init.Counter)); here. These are my w...
Hello,I am having trouble configuring and enabling DAC on my U575CGTx. I am a beginner programmer, and I have very little experience programming STM32 MCUs. Reading through the reference manual feels like learning Chinese.I do not have an external os...
Good afternoon,I have a problem interrupting the TIM3 Timer, I inserted an output pin to make an alternation but no oscillation appears on the pin.Source code attached.I compared it with other examples and in my understanding everything seems to be f...
Is it possible to use the ITM or to get debug message from the stm32g051 using the PEmicro multilink universal? I try to insert this code but aparently there is no CoreDebug on the stm32g051g8. Thank you.
I was trying to interface W25Q256 with STM32H563ZI in QuadSPI mode as i have done with normal SPI it was working fine as i need to operate at higher frequency than normal spi for continous read and write operation. I tried to read Device information ...
The issue I am having is as follows on the STM32G051C8T6. We are using the internal RTC with Vbat pin. On this MCU Vbat can be internally configured to be read by the ADC by diving by 3 Bridge. We have ADC Setup, I am making sure we perform the ADC C...
Heyho, just checked the build analyser in STM32CubeIDE for my L031 project and found "impure_data" in the RAM list.Can anyone please explain what that is? Google didn't really help... Just curious, RAM size is not a problem for this project (32kB fla...
I am using TIM1 Channel 4 to generate a PWM signal to control a servo motor. My goal is to achieve speeds from 0 to 3000 RPM by increasing the PWM frequency every 1 ms (acceleration).To achieve this, I calculate the ARR and PSC values corresponding t...
Hi,I am facing an issue with my STM32L562E-DK board. Initially, I was able to debug it using STM32CubeIDE. However, after attempting to configure the controller in UART boot mode, I accidentally enabled read protection (DC:LEVEL 1). Since then, I can...
I am using the STM32H745I-DISCO board, where Core M4 handles SDMMC and FATFS, and Core M7 manages USB Mass Storage Class (MSC). Is there a procedure or any available documentation on linking both cores for seamless data sharing?
