Soft error rates for safety applications in STM32G473
Hi all,I am looking for Soft error rates (FIT values) for STM32G473 for FMEDA calculations. Could anyone point me to such data? Regards,Salman
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SW RESET while retaining particular GPIO state
Hello! I am currently working on the stm32h747 dual core microcontroller. i have a specific scenario where i must reset the system (i am using the "NVIC_SystemReset()" function for this purpose), however, i want to retain the state of several GPIOs (...
STM32G0C1RETx in Boot mode.
Hi everyone,i am using stm32g0c1retx MCU for i2c communication in slave mode. in normal mode i am able to get the data and ACK on i2c line, even after changing the different slave addresses. i am using single address mode for communication. But, when...
STM32F4 in hardfault caused by CAN
Hello everyone, I am using an STM32F405 for a communication over can. It is receiving the messages on CAN1 and CAN2. For drivers I use STM32_HAL. My initialization procedure goes the following way:Init clocksInit GPIOsInit CANInit CAN peripheralInit ...
STM32F407 - CAN2 and TIM7 problem
Hello,In my STM32F407G-DISCO based project I use CAN1 and CAN2 to communicate with two encoders. I read the position of the encoders every 4 ms. I use TIM6 to generate an interrupt every 4 ms. It all works beautifully - it sends the position of each ...
Some guidelines on what's appropriate to put in CCMRAM on STM32F4 for optimal performance?
I'm working with the STM32F405 microcontroller and I recently ran out of RAM, but then I discovered that the 64 kB CCMRAM was completely unused. Given that the CCMRAM was supposed to be fast, I moved the stack and state variables of low-level drivers...
Enable UART TX over ST-LINK/V2 on unused SWO pin
Hello, maybe a lame question, but how to force enable SWV even if the microcontroller in the project does not support it? Or use ST-link's SWO as console input? (does not have to be SWV)I got a project in Cube IDE for STM32G071KBU3 microcontroller us...
STM32U575 SPI data size issue
Hi,I am using STM32U575VIT6Q in a BPSK receiver. The STM32U575 SPI1 is set to slave, receiver only. GPDMA channel 6 is linked to the SPI1 input and buffering input data to a data array. The SPI1 clock input (PA5) is connected to TIM1 channel 3 output...
STM32U5A9 SPI Hardware SS output enable mode not working as intended
HiI am struggling to get hardware SS management to work.SSM=0, SSOE=1andSSOM=0, SP=000From RM0456 ( Section 68.4.7 Slave select (SS) pin management ) I am expecting that the SS pin is driven to active level when transfer starts ( CSTART = 1 ) and it ...
Resolved! USART3 offset bytes when receive for the first time after boot
Hello, I am using a nucleoH743ZI2 and STM32CubeIDE v1.13.2 on windows10I configured the USART 3 in order to receive some telecommands from my laptop (windows 10) using a software (HTerm v0.8.9)The telecommands are written in binary, 52 bytes, but the...
