STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...
The new STM32H7R/S lines are built on the success of the STM32H7 series, offering even higher performance and security at a lower cost. The STM32H7R/S is a bootflash-based MCU powered by a Cortex®-M7 core running up to 600 MHz, with 64 KB of user fla...
Looking to add self test to a project using both STM32L4 and STM32H7While going through the versions of x-cube-classb, it appears versions 2.2.0 must be used for STM32L4 and version 2.3.0 and further for STM32H7.Is there a way to use same version of ...
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Hi,I am using FMAC for STM32G4.I can't find an example FMAC_IIR_DMAToDMA.I tried to configure a DMA instance for Input but the example was not working.1- Besides the DMA instance, should I use 2 more DMA instances, one for input and one for preload?2...
Below i have attached a code which enables the PLL freq of 72MHz using HSI of 16MHz. The issue is if I give a Timer pre-scaler of 36000-1 (I am using timer2, which in case of STM32F401RE is on APB1 bus so using a pre-scaler of 2 for APB1 which makes ...
Using Nucleo-U575ZI-Q (rev X) board I try to do a PoC - a very simple UCPD source app providing default USB 5V and 0.5A max. With undocumented onboard SB8-10 shorten this probably can be accomplished. I know this board does not provide output current...
Hi,Im trying to get CRC16 - DNP from a string array that its the next:char Message2[] = { 0x00, 0x00, 0x00, 0x29, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x31, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x32, 0x30, 0x36, 0x33, 0x57...
Hi there i m a student working on STM32F723 the first time, I encountered an register setting example as follows: GPIOC->MODER |= ((2<<(6*2)) \ (2<<(7*2))); i konw its setting the GPIO register but whats the meaning of * and 2<< at the beginning sen...
I'm a bit confused about the necessity of clocking the SWD ports using STM32G0B1 chip.There is a I/O port clock enable register (RCC_IOPENR) that enables the functioning of each of the GPIO ports (Port A - Port F), its reset state is all zeroes, so n...
I have an app where I timestamp all the data I get from a bunch of external devices. I'm trying to come up with the fastest way to read the RTC and have 2 approaches, one using snprintf and some LL driver code that's pretty easy to read. It's not m...
Hi,Reverse bootloader, code to perform firmware update can reside in the last sectors of the STM32 Flash?I am interested in using firmware update via USB Host DFU, but the application has a dual clock speed boot, to reduce consumption when not connec...