I think, using SAI for SPDIF Tx, can go wrong (in terms of clock config, the MCLKDIV setting):The CubeMX tool, used to configure SAI as SPDIF Tx, generates completely wrong PLL setting and codethe HAL driver, doing the config, in file "stm32xxx_hal_s...
Per spec. STM32H747 has 1MB on-chip memory available. However, how that memory mapped is something I don't quite know. Linker allocates 256K @ 0x2000000 for code, and there's some DMA memory @ 0xD000000, but it's size is mystery as there's no explici...
STM32H743STM32CubeIDE - Version: 1.14.1 Build: 20064_20240111_1413 (UTC)STM32CubeMX - Version: 6.10.0-RC9 Build: 20231120-2037 (UTC)Software Pack (AzureRTOS) 3.2.0STM32Cube_FW_H7_V1.11.1 OS: Linux LMint 21 I am using the FTP server which works when c...
Problem whit ADC1 the if (HAL_ADCEx_Calibration_Start(&hadc1, ADC_CALIB_OFFSET, ADC_SINGLE_ENDED) != HAL_OK) return errorwhy??
Hi Team,Currently, I have a product developed with an STM32L476RE as its main processor. This equipment is battery-powered and is used by our customers to perform measurements in remote places. After performing the measurements, this equipment is con...
I'm trying to check I3C protocol between IKS02A1 with NUCLEO-H503RB. and I just followed the guide which is below link. https://wiki.st.com/stm32mcu/wiki/Getting_started_with_I3C And I also tried I3C_Controller_Private_Command_IT code from the github...
I am using stm32l496 I am trying to enter sleepmode in freertos, but for some reason the system does not enter it. GLOBAL void SleepMode_Activate(void) { unsigned int sleep; flag = 1; /*Disable display task if not already disabled*/ if (mt...
The STM32U0 Series is very interesting, and I would like to use the small WLCSP package in a design for a new product, but the STM32U031G8Y6 is still in evaluation. Does anyone know when the STM32U031G8Y6TR will be available for purchasing?Thank you...
Hi All.In STM32H743, if ICache is enabled and DCache is turned off, SPI frequently uses DMA to transfer data(SPI transmission interval is within 10ms), and ETH may experience transmission lag; If ICache and DCache are turned off, there is no problem ...
I need to chain two timers together to get one 48-bit timer that counts microseconds, I'm thinking of using TIM2 as the master and TIM3 as the slave. I have the feeling some of the answers are contained in this table in the Reference Manual but I can...
