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Resolved! possible errata in STM32L4R5 reference manual (rev9)

page 1320; timer 2 input pwm mode"1. Select the active input for TIMx_CCR1: write the CC1S bits to 01 in the TIMx_CCMR1 register (TI1 selected).2. Select the active polarity for TI1FP1 (used both for capture in TIMx_CCR1 and counter clear): write the...

b.a. by Associate III
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Resolved! Errors in figure

In RM0351 Reference manual Figure 420. USART block diagram, the positions of shift registers and data registers (of both Transmit and Receive) are wrong; their positions should be swapped.  

errors_in_figure.png

Stereo FMAC

Hi ST!I am writing to ask if any ST MCU's will be released with 2x independent FMAC units?At the moment, doing stereo audio processing with a single FMAC is problematic (and ST MCU's ONLY have a single FMAC unit), especially being unable to load the ...

etheory by Senior II
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STM32F767 LTDC dual layer and external SDRAM

Hello,i have custom made board assembled by STM32F767BIT6 and external SDRAM IS42S16400 for video buffers.The MCU runs at maximum speed 216MHz. LTDC seems to work fine bud when i use dual layer, the second layer seems that reading from external SDRAM...

Petr3 by Associate III
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