STM32 MCUs products

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New possibilities for the ultra-low power segment!

STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...

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EXT Interrupts not happening ?

Posted on November 20, 2011 at 12:21I use the STM32F103RTE6, I cannot get the EXT interrupts to happen: I do the following: - RCC config, all the IO port clock are set RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIO_DISCONNECT|RCC_APB1Periph_TIM2|RCC_APB...

benbb by Associate II
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TIM2 Interrupt -> HardFault Exception

Posted on November 20, 2011 at 11:09Hi Forum! First time I'm trying to do something with interrupts, and I get a HardFault Exception I'm using the IAR Workbench 6.3 with the STM32DISOVERY_VL - EvalBoard. Here's the main-function code (completely co...

STM32F4 USART BAUDRATE-Problem

Posted on November 19, 2011 at 16:18Hi Everbody!I'm trying to set up an USART Connection to my Notebook. Everything works fine but does anyone have a clue why I have to multiply the baudrate-setting with 3 to get the correct baudrate? for Example:  ...

flash86 by Associate
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Changing the baudrate of SPI

Posted on November 20, 2011 at 01:50Do I need to disable SPI before changing the SPI baudrate?Or, would it be enough if I just wait till the end of the communication and then change the baudrate without disable/enable the peripheral?The spec says ''...

hate_pod by Associate
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GPIOs not functioning, what gives ?

Posted on November 19, 2011 at 15:02All, I`m fairly new to the STM32 family, not new to C or other micros: I use: Keil Lite: V4.22.22.0, 4.22a with an ST-Link, this all works and compiles etc. I can run code on my board no problem !! Now I`m trying ...

benbb by Associate II
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SDIO command CRC error on ACMD41

Posted on November 07, 2011 at 22:59When single stepping through the initialization commands for the SDIO card socket (STM3210E) I notice that ACMD41 always returns a command CRC error flag.  The ST example code specifically ignores the CCRC FAIL fl...

when is SPI clock sent?

Posted on November 17, 2011 at 12:20Unfortunately I do not own an oscillope nor a logic analyzer to see this.I'm having some problem using the SPI controller to communicate with a sensor.I've managed to get some data, but not in a consistent way.In ...

FSMC problem with low address

Posted on November 17, 2011 at 15:38When try to access to SRAM through FSMC (SRAM example from IAR 6.1) I don't see any address on  ADDRESS 7:0. Only high frequancy (> 10 MHz) peaks and splashes. With ADDRESSes 20:8 all OK. With DATA BUS all OK.  Re...

milds by Associate II
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