OCREFCLR is not reset after update event
Posted on September 24, 2013 at 15:23I have a problem using the OCREFCLR input to TIM1 on a STM32F3. I have set up TIM1: upcounting, CH1 in TIM_OCMode_Combined_PWM2 and CH2 in TIM_OCMode_PWM1. I have set OC1CE (Output Compare 1 Clear Enable) and OC2...