User Activity

Posted on March 18, 2014 at 18:39I'm trying to configure the I2S pll for what will ultimately be 8KHz sampling and using the STM32F4xx_ClockCOnfiguration_V1.1.0, I get values of PLLI2S_N = 256PLLI2S_R = 5for a crystal of 8MHz and HCLK at 168MHz...Ev...
Posted on November 27, 2013 at 20:15 I've developed a single project[using two separate irom sections which keil currently manages] that contains my bootloader and ApplicationMain(). The first flash block is reserved for the bootloader that runs...
Posted on October 21, 2013 at 20:07 I've DMA1 stream 3 channel 0 configured to handle the I2S2 data coming in from my UDA1380 codec and what I notice is that when configuring the Memory0BaseAddr to be the beginning of my circular buffer, the con...
Posted on July 29, 2013 at 23:52What limitations are there within the PDM filter library? I'd like to be able to record with FS at 8KHz...the original project files show 32KHz spi configuration but FS at 16KHz and the low cutoff at 8KHz; if I want t...
Posted on July 17, 2013 at 21:12 When using the Audio_Playback_and_record example I was able to communicate with the codec[UDA1380] I2C interface[PB6, PB9] but when using PB6 and PB7[on my own board], I get a NAK even though the data appears to ...