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Posted on January 28, 2016 at 17:56 Hello everybody, I often declare my variables in the CCM memory, very useful as I use a lot of RAM memory. For example I can declare this variable: static uint8_t VARIABLE __attribute__ ((...
Posted on January 29, 2016 at 16:27Hi, I am trying to measure practical speed of USB transfer in CDC device class for STM32746G-Discovery board and I can not find an example project in the cube. However, there is an example code for STM32756G_EV...
Posted on January 31, 2016 at 09:54I'm trying to use thishttp://pulsesensor.com/ with stm32f10x uC.I'm not having much luck, so I just want to ask if there is someone who have some experience with this sensor and that can tell me how to set properly...
Posted on February 01, 2016 at 17:26IAR Embedded Workbench Consider timer TIM7 initialized and started in some IRQ handler in the next sequence: void SOME_IRQ_Handler(void) { TIM7->PSC = some_value; TIM7->ARR = some_value; TIM7->EGR |= TIM_EGR_UG; T...
Posted on January 30, 2016 at 17:50.
Posted on January 31, 2016 at 17:30HelloI am gathering info for a project device that would be HTTPS client sending data to specific server, I found this AppNote for lwIP http://www.st.com/st-web-ui/static/active/en/resource/technical/document/user_...
Posted on January 22, 2016 at 10:37Guys, I tried to use SPI2 and FATFs on STM32CubeMX, but I found two files with the same function, which one should I modify to make it work ? thanks
Posted on February 01, 2016 at 06:21Good afternoon.I have problem control of disable and enable all interrupts in this processor.Compiller ''arm-none-eabi-gcc'' say me:''bridge.s:400: Error: selected processor does not support Thumb mode `mrs r2,pri...
Posted on February 01, 2016 at 10:26 I want to generate an interrupt after 2 seconds and I am running at 32 MHz. However, my interrupt is issued as soon as I enable the interrupt. What am I doing wrong? void testTimer4(EventCallback_t...
Posted on January 30, 2016 at 23:13See line 678 :while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLRCLK) The intend is to check System clock switch status (SWS field of RCC_CFGR) after writing to System clock switch (SW field of R...
