Posted on October 20, 2016 at 18:19 STM delivers record performance and advanced secure services for the IoT with the new STM32 high-perf MCU series http://www.st.com/content/ccc/resource/sales_and_marketing/promotional_material/flyer/group0/8a/50...
Posted on October 19, 2016 at 23:08 The original post was too long to process during our migration. Please click on the attachment to read the original post.
Posted on October 19, 2016 at 07:28 Hi all, i have a problem with my program but i can not find the error. Maybe here is one who knows what i'm doing wrong. I want to meassure the time between two edges. I works most of the time, but some...
Posted on October 20, 2016 at 13:55The website has some preliminary data for the 400 MHz STM32H74 now.
Posted on October 19, 2016 at 11:22I was wondering if it is possible to find the data in the programming and references manuals in machine readable format. The basics would be the peripherals, their registers, and their fields, but the list of IRQns...
Posted on October 19, 2016 at 09:08The original post was too long to process during our migration. Please click on the attachment to read the original post.
Posted on October 20, 2016 at 12:57Hello, there�s a mistake in the line 270 &sharpdefine GPIO_AF_2 ((uint8_t)0x02) /* COMP1_OUT, TIM1, TIM2, TIM3, TIM4, TIM8, TIM15, TIM16 */ The GPIO_AF_2 is NOT working for the TIM2, at least in the st...
Posted on October 20, 2016 at 11:45 Hi All, I have an STM32L476RE connected to an audio codec. The audio codec is the master.SAI1_Block_Ais configured asSAI_MODESLAVE_TX,SAI_ASYNCHRONOUS,SAI_I2S_STANDARD,SAI_PROTOCOL_DATASIZE_16BIT,SAI_ST...
Posted on August 17, 2016 at 12:22Hi,I'm working on nucleo-f767zi with ethernet communication (LwIP stack).At startup (power-up or reset), randomly, the Ethernet module does not receive any frame.In other startup, it works fine.When it doesn't work,...
Posted on October 19, 2016 at 09:56The original post was too long to process during our migration. Please click on the attachment to read the original post.
