STM32F446 RM0390 BKPSRAM description bugs
Posted on September 12, 2017 at 20:49ADC is irrelevant.Should be RCC AHB1 peripheral clock enable register (RCC_AHB1ENR).JW
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STM32F446 MCO2 from I2SPLL
Posted on September 13, 2017 at 12:38There's no source of PLLI2S signal mentioned anywhere else on the schematics, nor elsewhere in RM0360 (although the string occurs quite often as it's the name of the PLLI2S sub-module).My personal guess is, that ...
2 Timers use with stm32F746BG
Posted on September 05, 2017 at 04:58Hello, I use MDK-Lite 5.23 uVision / stm32F746BG. I work with two timer interrupts at the same moment: TIM1_UP_TIM10_IRQHandler(void) + TIM2_IRQHandler(void) + program code at the main() function void TIM1_UP_TI...
IR diode connection
Posted on September 13, 2017 at 11:35The following circuit was pointed out on a local electronics forum:I mean, it *may* work, under certain circumstances... nonsense nevertheless.One of the comments was, that it nicely complements Cube... ;)JW
Error when trying to save a variable in an EEPROM using I2C
Posted on September 12, 2017 at 14:52The original post was too long to process during our migration. Please click on the attachment to read the original post.
STM32L496 USART1 RX crash @ 1.8V IO
Posted on September 12, 2017 at 10:50Dear community.I have a very interesting issue - I am working on STM32L496 Nucleo board and working with USART1. Everything works fine there with USART1 receive/transmitting in INT mode. (Nucleo runs 3.3v with ...
What happens if I use the same priority and sub-priority in multiple NVIC?
Posted on September 13, 2017 at 04:41Hi.Now I'm trying to implement USART interrupt mode.But I'm wondering if I use the same priority and sub-priority in multiple NVIC, what happens?For example,If I use as the below,NVIC_InitStructure.NVIC_IRQChanne...
SDIO (SDMMC) and FatFS with CubeMX
Posted on May 12, 2016 at 13:55Hello! I try to use the SDMMC1 interface together with FatFS. Initialization is created with CubeMX. My init is something like this: ... MX_LTDC_Init(); MX_SDMMC1_SD_Init(); MX_FATFS_Init(); ... Then I try to use the S...
DMA delay caused by Interrupts?
Posted on September 04, 2017 at 12:33 On my STM32F411RE I send data to my SPI2 peripheral port using DMA and it works fine, but the moment I enable any kind of interrupts for the NVIC it completely scrambles up my stream of DMA data on my SPI2 -...
TIM1 timer, register TIM1_BDTR, bit OSSI. What is the function?
Posted on September 06, 2017 at 21:28A citation from 'RM0041. Reference manual. STM32F100xx':OSSI: Off-state selection for Idle modeThis bit is used when MOE=0 on channels configured as outputs....0: When inactive, OC/OCN outputs are disabled (OC/OC...
