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STM32F429 WFI w/ interrupt disabled

Posted on February 07, 2018 at 09:47Hi,I'm developing on a custom board with STM32F429. I need to use stop mode for power consumption. We have some external interrupt (e.g. interrupt from accelerometer) we use to wakeup from stop mode.Wake up is wor...

STM32F767 ART versus ICache

Posted on May 08, 2018 at 15:37I'm using an STM32F767 at 216 MHz with LL_FLASH_LATENCY_7. The IDE is Keil with IROM (Flash) at 0x8000000. STM documentation AN4667 says, 'Flash memory is accessible by the CPU through ITCM starting from the address 0x...

John F. by Senior
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DAP access to SRAM

Posted on May 08, 2018 at 22:52Hi -Is it possible for a debugger to directly r/w to embedded SRAM via one of the debug APs (access ports) on the ♯  That is, I don't want to access SRAM via the M7 since the &sharpcache might be enabled.  I'd like to ...

STM32F415RG exit from standby without reasons

Posted on May 09, 2018 at 02:11HI, i have a project for stm32f415rgt, i generated the code with mxcube (last version) but i have a strange behaviour.I setted the ALARM_A + ALARM_B + Tamper + PA0PIN to exit from stnadby, but every 3300 seconds, the m...

Marco1 by Associate II
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Resolved! STM32L4 ISR source

Posted on May 07, 2018 at 18:26Hi,Is there any doc mention about STM32L4 (STM32L4996 and STM32L4A6) ISR source? The doc I found from both ST and ARM reference manual do seems list all of the ISR source.Thanks,****Note: this post was migrated and con...

PCROP Confusion

Posted on May 09, 2018 at 00:54I understand that there have been many threads about PCROP here. I am trying to understand the logic behind having to build code using mpure-code on gcc or the equivalent on other compilers that allows the avoidance of...

kirem by Associate II
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MPU regions and DMA

Posted on May 08, 2018 at 23:43I am confused over the inability to successfully setup an MPU region for the area that the DMA is using.  I am trying to get around having to use Clean and Invalidate Cache like so to guaranty the data is passed correc...