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I have been facing a reset issue.My controller resets randomly. I have Codded for the source of reset at the begin of the routine.For the testing the code I made the system reset on purpose and was able to find flags set for BOR, Software reset, Inte...
The problem is that the (working) TI DVM board starts the MOSI communication one half clk cycle before I manage to do it with my Nucleo-F030R8 so the the information gets bit-shifted into the chip and miss-interpreted.I'm using HAL and I've tried eve...
Hello,I am testing the processing time of a STM32L476 chip on a Nucleo board.Here below is the code:uint8_t algo_principal(s16 xin, s16 yin, s16 zin) { uint8_t retour; uint32_t i; uint32_t test; test = (uint32_t )xin + (uint32_t )yi...
How can i change the Frequency/Speed by which the Data is transfered to the UART TX pin?
What are the frequency that stm32 microcontroller peripherals work on ?
Hi, guys. I'm using the STM32L4 discovery (MB1184C) board to test DAC (Pin PA5).I use Keil uVision 5 to debug the code.I noticed the Timer trigger option and I want to use this.I want to put this MCU to sleep at the main function's while loop.Periodi...
Posted on October 29, 2015 at 10:36If you want a development system on chip, incremental software updates, test driven interactive developments this is worth a look: Mecrisp Stellaris Forth compiler updated with support for a number of STM32 control...
Hello,Iam trying to implement a phase shifted 4 channel PWM on STM32F302R8 .The PWM signals should look like the first picture. I use CH and CHN complementary PWM generation with deadtime insertion. PWM mode ist asymmetric PWM Mode 1 for both channel...
FLASH_OBProgramInitTypeDef OBInit; /* Set BFB2 bit to enable boot from Flash Bank2 */ /* Allow Access to Flash control registers and user Flash */ HAL_FLASH_Unlock(); /* Clear OPTVERR bit set on virgin samples */ __HAL_FLASH_CLEAR_FLAG...
Hello,I try to setup ADC1 and ADC2, but I don't get the timing values given in reference manual and data sheet. I work with STM32H743 NucleoI have setup RCC to clk ADC with 36 MHz from PLL2P. I checked the frequency at master clock out 2 on PC9. To i...
