2018-11-07 07:43 AM
Platform: STM32F429 Discovery Kit
I have created a simple project using Keil, to toggle GPIOs. The self generated code sets the clock at 168MHz.
When I look at the timing for the SysTick_Handler call, it is 3ms instead of the 1ms that I expected. Why?
Thank you,
Javier
2018-11-07 09:42 AM
It would probably be helpful to show the relevant code.
With the SPL, the most common reason was a HSI clock default definition of 25.000.000 in the stm32f4xx.h file, applied for a discovery board with a 8 MHz quartz (8.000.000).
The exact factor was 3.125, then.
2018-11-07 11:57 AM
That makes sense.
You are right (enclosed code), I did not change anything from the defaults....
This is the code: I
void SysTick_Handler(void){
HAL_SYSTICK_IRQHandler();
HAL_IncTick();
HAL_GPIO_TogglePin(GPIOA, GPIO_PIN_0);
}
/**
* GPIO Ports Clock Enable
*/
static void GPIO_Initialize(){
GPIO_InitTypeDef GPIO_InitStruct;
__GPIOA_CLK_ENABLE();
GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
}
int main(void){
int timeCount = 0;
HAL_Init();
/* Configure the system clock to 168 MHz */
SystemClock_Config();
SystemCoreClockUpdate();
GPIO_Initialize();
while (1){}
}
void _SystemClock_Config(void)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct;
/* Enable Power Control clock */
__HAL_RCC_PWR_CLK_ENABLE();
/* The voltage scaling allows optimizing the power consumption when the device is
clocked below the maximum system frequency, to update the voltage scaling value
regarding system frequency refer to product datasheet. */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/* Enable HSE Oscillator and activate PLL with HSE as source */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 25;
RCC_OscInitStruct.PLL.PLLN = 336;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 7;
if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
/* Initialization Error */
Error_Handler();
}
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
clocks dividers */
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
{
/* Initialization Error */
Error_Handler();
}
/* STM32F405x/407x/415x/417x Revision Z devices: prefetch is supported */
if (HAL_GetREVID() == 0x1001)
{
/* Enable the Flash prefetch */
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
}
}
2018-11-07 12:06 PM
RCC_OscInitStruct.PLL.PLLM = 25; // Not good for a board being clocked at 8 MHz
Check also HSE_VALUE in stm32f4xx_hal_conf.h
2018-11-08 06:31 AM
Thank you, I will look at the configuration of the clock; I thought the template was for the board but I guess it is just generic and has to be tweaked.
Thanks again,
Javier
2018-11-08 08:14 AM
After changing: HSE_VALUE to 8000000 and setting RCC_OscInitStruct.PLL.PLLM=8 it woks fine.
Thank you
2018-11-08 10:25 AM
This link was very helpful too.
https://stm32f4-discovery.net/2015/01/properly-set-clock-speed-stm32f4xx-devices/