Is this a documentation error? (PM0214: Cortex-M4 programming manual, NVIC base and offsets)
In section 4.3.11 NVIC register map (p.217) the base address of the main NVIC register block is stated to be 0xE000E100. The Offset to NVIC_ISER0 is then given as 0x100. This would make the address 0xE000E200.On p. 208, however, the address of NVIC_I...