Ask questions, find answers, and share insights on STM32 products and their technical features.
Hi all,To be hontest, I am a beginner when it comes to timer and capture hardware. Maybe someone can help me figuring out what the best way is how I can measure the time between two separate impules i get on two separate lines. Accuracy shall be very...
Implementation on: STM32L476RCI can configure a periodic sleep cycle by waking up through the RTC through calling HAL_RTCEx_SetWakeUpTimer_IT.I'm now trying to handle an EXT interrupt while in this periodic sleep cycle.The goal is to handle the EXT i...
rtc year is uint8_t, does anybody know how to identify year less than 2000 or more than 2000?Regards,
Hello. I try to calculate some pulses by wakeups from shutdown mode. I have 2 pins which areWKUP1, WKUP4. They are configured to wake up by rising edge. But sometimes when only 1 of them is rising, I receive 2 notifications, from both pins.The proble...
I'm working on a project for a battery charger and for safety purposes I want the complementary outputs of the HRTIM to be disabled when the core is halted. On the STM32F334, setting the HRTIM_STOP bit in the DBGMCU register resulted in both the HRTI...
Hello, We have been trying to read 12 bytes of data on EC25 from stm32 controller.On the first run, data is transmitted by stm32 in slave trasmit mode and EC25 is reading the data correctly. We are able to capture the read log on EC25[Master read mod...
I use 2 board for generate pulse and count pulse.I generate pulses with 4Hz frequency by first board and print number of each pulse also when I press button pulse production stops and then after 20ms products a another pulse(I things micro in second ...
Hi,In stm32f051, iwdg is not working, I think.After enable iwdg, encounter the while(1); loop , reset is not issued.NRST pin is connected to RC reset circuit.BRPaul
In SPIx_I2SPR, I2SDIV=1 is probably fine as long as ODD is kept 0.https://community.st.com/s/question/0D50X00009XkYmHSAV/f2f4-i2s-extclockThis constraint probably unnecessary puts pressure onto using higher than necessary I2S clock, and restricts cer...
In the single-port DMA, CCR.EN when set, it locks most of the registers, including all other fields of the CCR register itself.Moreover, EN is not autocleared when single-transfer is complete. This is not documented clearly anywhere.These two things ...
