STM32 MCUs Products
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I2C and FIFO STM32L152 ?
Dear Members,I try to translate this paragraph in datasheet :FIFO DataThe circular FIFO depth is 16 and can hold up to 16 samples of SpO2 channel data (Red and IR). The FIFO_DATA register in the I2C register map points to the next sample to be read f...
Resolved! 32F412GDISCOVERY uncompiled code
I have a 32F412GDISCOVERY and I'm interested by the things happening in the demo of the board but I'm not able to find any code. So does anyone have it or have an idea how to get it? I appreciate any help.
Defining NOLOAD section in ld script for GCC
I want to define a new section in ld script so I can use that for variables which have to keep their values in case of soft resets (like IWDG).I have done some researches and wrote something like this and added that below the .bss section in ld file....
Automatic discrimination between QUADSPI and OCTOSPI
An early rev. of RM0432 mentioned a magic id 0xA3C5DD01 at offset 0x3FC for OCTOSPI. So I thought the presence of that value would be a reliable way to detect the OCTOSPI interface. But the G474 exposes that very id, too ...The only idea that came to...
Resolved! STM32F767 USART1 DMA2 TX works, RX does not. But with another UART/DMA it does. Why?
I have the following code to perform a serial transaction. The idea is that RX DMA is configured first to catch bytes as soon as they are transmitted in response from the other device. TX works great, but RX does not. Interestingly enough, if I use a...
CAN bus receive and transmit issues on both buses with STM32F746ZGT6
Hey I was hoping that the STM community could help me with a problem that I have been stuck on while developing a CAN bus application. I have a STM32F746ZGT6 micro controller on a custom PCB with two isolated CAN transceivers, ADM3054. My setup is as...
Resolved! SPI clock issue in modes 2 and 3: H743
The clock and data lines on SPI seem to go tri-state off when not in use even though the SPI channel is left open. Is this expected behaviour? It causes issues with some connected chips as they see the re-establishment of the driven clock signal as a...
Multiple DMA Requests for the same DMA Stream
The STM32H7 series has come with the concept of DMAMUX which is different from the older series. it looks awesome and better than the dma request mapping table.But I wonder if it can route multiple dma requests to the same dma stream or not?To be mor...
Resolved! Prevent zero-initialized arrays in CCMRAM from being stored in FLASH.
I am using the CCMRAM to store some large array which should be zero-initialized.My definition for the arrays is similar to:__attribute__ ((section (".ccmram"))) uint32_t large_array[4096];Obviously, there is no constructor for these and there should...
