Resolved! Why is CMSIS/DSP arm_fir_f32() using more than one clock cycle per tap? (not using VLMA instruction)
I am currently performing timing and performance measurements for the CMSIS/DSP FIR filter functions on an STM32F412. I toggle a GPIO before and after executing the arm_fir_f32() function and record the signal on a scope.My results are:Details: Sampl...