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Hi Everyone. I'm modifying a the example project "ADC_RegularConversion_DMA" for the STM32F4-Discovery board.I now want it to work via TIM2 trigger. I would like TIM2 to trigger the ADC, and then the DMA to transfer the ADC result to a buffer.The pro...
Hello,I am trying to add s RAM section at the end of the RAM to savesome data (states) between warm reboots, when the watchdog kicks due somewiring problems (i2c).I changed the ld file as:I reduced the stack -2kI reduced ram -2kI created a RAMAUX and...
All the STM32L4 reference manuals. describe LPTIM_CFGRBit 20 WAVE: Waveform shape The WAVE bit controls the output shape 0: Deactivate Set-once mode, PWM / One Pulse waveform (depending on OPMODE bit)OPMODE bit is mentioned nowhere else ....
I want emails for replies to my posts, but I'm getting a few emails per day on random topics that I am not involved in. For example, I just this: "FLosa.1 asked group STM32 MCUs: How do I send my input data to a neural network on an STM32F4 to make ...
We are using STM32H753 controller In Power off condition we checked VBAT discharge current in STM32H753BIT6 .The discharge current is pulsating from 4uA to 28uA.We enabled only RTC peripheral.We are not sure why the behaviour is like this
I'm layout a SDRAM to STM32F767. For convenience to layout the tracks, I want to rearrange the address and BAx lines as above. I've never done SDRAM with STM32, so I wonder if it will work well to do this?Thanks.
I have 3 USARTs working on my STM32G071 nucleo board. One is for communication with PC and transfering settings registers. Second one comunicate with GPS. And third one just resend everything received from GPS module, it enables me see in PC, what GP...
