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I need to use all four Capture-Compare interrupts to use multiple timeouts for TIM5 on STM32F427. It is a 32-bit timer.The problem I am running into is that the interrupt flags are constantly high (e.g. CC4IF,CC3IF,etc.) . As long as only one CC-inte...
Hi, AllI managed to apply sd card(SDHC, smasung evo 32gb) using sdio in cubemxAnd now, i want to apply with sd card(SDXC samsung evo 64gb) using sdio in cubemxBut some reason it didn't go well. it seems like the stm32f7 can apply exfat(in cubemx,...
I am learning serial protocols using STM32 boards (F411RE and L432KC). So far I have successfully configured the boards as master and slave to send data from one board to another, and as I checked it works perfectly(I communicate the received data fr...
Hello everyone,I apply STM32F746BE with externel SDRAM and externel FLASH, Ethernet, LCD, I2C1, USART1, USART6. I-Cache and D-Cache disable.Bootloader located in the internal ROM configures SDRAM and QSPI in memory-mapped mode, then launches firmware...
I have a specific problem, I'm trying to read data from a serial source, length unknown, transmission length known, in an RTOS environment (FreeRTOS to be exact). I'm using the HAL drivers because at least, they set things up for me.I have several p...
Hi again, everybody. I appreciate that you can help me, I do not speak English so I am using the google translator, any detail you need to help me I will give you with pleasure. I have been trying to program a STM32F103 card as a slave in i2c communi...
Hi there, I'm pretty new to handling I2C communication protocols and could use some help in figuring stuff out. I've been attempting to get two STM32f042k6 boards to communicate with one another but my master device doesn't seem to receive any of the...
Hello guys, I'm using STM32L433RC MCU and I'm developing IAP Bootloader and DFU routine. I'm stuck in Flash memory sturcture of STM32L4 because the stm32l4 Reference manual(RM0394) shows there are 2Kbytes pages in Flash main memory(3.3.1 Flash memory...
I know the latency of Cortex M3/M4 of interrupt is 12 cycle, I got a scenario that interrupt and DMA use same trigger edge from external. Before the DMA starts transfering, I wanna ensure that CPU will not change the data. so the IRQ must be set to m...