While I was reading a book about DMA I came up with some questions. I tried reading AN4031, RM0090 with no better luck in understanding.The problem has to do about bursts in DMA. The questions are theoretical and there is no source code to follow the...
Hello,I worked till now with H7 (stm32h743) and UARTs and had no issues at all.But recently I needed to port the project to L4 (stm32L496).For some reason UART now behaves differently:With polling there is no issue, but with interrupt or dma:As long ...
Last item 5 on page 191 (Section 5.1.5) says: 5. Wait for at least 1 1us and thenIt should say: 5. Wait for at least 1us and thenThere is an extra "1 " before the 1us.
Hi folks,i recently tried to migrate my SSD1306-I2C-display driver using DMA from "STM32Cube FW_F1 V1.6.1" to the latest "STM32Cube FW_F1 V1.8.0".The driver uses HAL_I2C_Mem_Write_DMA(..) routines and worked just fine on the old Cube firmware. Now wi...
I plan to use an STM32F7 to adress three different CAN-Buses. As the spec sheet says there are 3 available I don't see a problem. However the reference manual talks about a dual and single CAN Bus architecture with CAN2 being the slave of CAN1. Is it...
can anyone help me to know the reason for this unusual behavior or what am I missing here.
Hi.I want to use my MCU at its max Speed.I am using STM32F103C8T6( Blue Pill ).Can any one Provide good resource?can anyone Provide source code for this ?Can anyone tell me about that in my Controller Why are we using RCC_CFGR and RCC_CFGR2?What is t...
What registers do I look at and what bits? Also, does the peripheral library wrap all the code needed to handle error frames? We are using a board Nucleo-G474RE.This question was already asked at https://community.st.com/s/question/0D50X00009XkhBe/ca...
I'm working on a project, which is built on the IAR workbench 7.50 ID. I'm trying to compile the code since so long, but I keep getting errors in the .icf file, and I don't know how to resolve them. Basically, all the identifiers/ keywords in the .ic...
