STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...
i want to implement a timer which make a perticular pin to toggle at perticular time duration the duration could I set manaully.
Hi,my question is simple , i have these parameter :Can_Clock = 48 MHz Prescaler = 1;NominalTimeSeg1 = 18NominalTimeSeg2 = 4and this is the MX_FDCAN1_Init() :static void MX_FDCAN1_Init(void) { /* USER CODE BEGIN FDCAN1_Init 0 */ /* USER CODE E...
Posted on January 16, 2018 at 10:34Hello,I need to control the acquisition and generation of a signal using the STM32F746ZG and its internal DAC and ADC. The idea is to trigger the DAC using one timer and the ADC using another timer (without the use...
I got a sample cubemx project which is in STM32f4 series using FREERTOS, my hardware is designed for STM32F0 so i cant use the sample code.so please suggest a method..
I ported openocd to the stm32l522. https://github.com/morbos/openocd-0.10.1openocd -f board/st_nucleo_l522.cfgFrom there you can remote connect from gdb, flash, and see the s/ns processor regs. Watchpoints work also.Hedley
Hello,On my custom designed PCB, there is a STM32F7 processor. With SPI DMA interface, I try to get the converting values of the external ADC. But everytime I get 3.1V in debug session. So how can I read the correct values based on the input signal?w...
Couple of complaints over at the Keil forum of the compiler shutting down, new key was published today (02-Jan-2020) to address that.https://www2.keil.com/stmicroelectronics-stm32/mdk
My board has QSPI NOR memory (MT25QL256, 32MB) and STM32H750. I used Studio, CubeMX and CubeProgrammer to work with QSPI external memory on F746G-Disco board with no problem. But I have problem on my board with QSPI. My H750-MT25QL schm is same as in...
Looking for confirmation that the SDRAM data bits can be swapped within their byte lanes (D15..D8, D7..D0) to reduce the routing complexity. We are using vanilla SDRAM (non-DDR), specifically the ISSI IS42S32800G.Thanks.
Hi all - Happy NY!I've a stm32H743ZI2 (nucleo) and am using the following code to init the IWDG __HAL_RCC_WWDG1_CLK_ENABLE(); __HAL_DBGMCU_FREEZE_IWDG1(); //not working!!!? // Reload = (LsiFreq(Hz) * Timeout(ms)) / (prescaler * 1000) hiwdg.In...
