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Hi All,I know the dreaded 'Failed to load MI command' error has been much discussed on the forum but I can't find any posts which match this set of circumstances, so hoping somebody can help.My project was working perfectly on STM32G0 but I need to p...
I have an overconsumption of ~50uA when going into stop2 mode with the DMAT of LPUART set.Because of the silicon bug (LPUART does not generate DMA requests after setting/clearing DMAT bit), I can't easily clear this flag (the workaround can lead to l...
Hi, I am using STM32G0B1x MCU on my custom hardware and using built in FD CAN controller for communication with external CAN 2.0 device. ATA6560/1 is the CAN transceiver chip from Microchip I am using on my custom board. As per datasheet this chip is...
Hi :Does anyone have en.stsw-link007_V2-33~en.stsw-link007_V2-35?For some reason, I need old stlink firmware.
I have some data that is accessed from a normal context and also from an IRQ. I am disabling the interrupt to prevent interrupted access. So no concerns there. However, what about forcing both the normal context and the interrupt context to have the ...
HiWe are facing problems when reading a data that is written to the flash using the following function?Every time we write in reading the data the micro-controller crashes. Even if I want to see the content of the flash in that particular address usi...
I have a custom PCB with a STM32H7A3ZI MCU, and a S27KL0642S27KS0642 Hyperbus RAM.My code, as well as the app note (AN5050) I'm following sets up the RAM for memory mapped access.I've checked and rechecked the pinout and configuration, but every time...
The memory I'm writing is 16-byte aligned (both flash destination and RAM source) and a multiple of 16 bytes in length. Using HAL to write the flash. Writing the first quadword fails with the error OPTWERR. This is quite unexpected since I am not, as...
I have an application running on STM32G491 which uses the RTC. There is an external 32768Hz crystal and a backup coin cell battery (I have checked that it is not depleted: 3.12V). There are two issues:Scenario #1: I pull the main battery, wait a bit,...
Other chips have the erratum "Transmit data FIFO is corrupted when a write sequence to the FIFO is interrupted with accesses to certain OTG_HS registers" (eg ES0392 2.25.2 for STM32H743). It isn't listed in the ES0596 rev5 errata for STM32H7Rxx/7Sxx ...
