Posted on June 13, 2017 at 09:15STM32L053 Nucleo Board.I am trying to program or erase board using ST-LINK_CLI.exe (Ver 1.3.0) / STM32-LINK Utility (Ver 2.3.0) but I get error message saying 'Read out protection is activated' I am not able to erase ...
Solution: the ARPE bit was not set in the CR1. TIM1->CR1 |= 0x0080; solved the problem.Dear community,I am experiencing with an issue using TIM1 as a PWM timer. It all works fine, I can set the frequency and duty cycle with TIM1->ARR and TIM1->CCR1. ...
Have found great info on very flexible op amp with pga ability. The STM32H7 - OpAmp presentaion for example. Have found great info on ADC subsystem in the STM32H7 - ADC presentaion and in datasheets for specific STM32H7 part(s).Have seen the very w...
Hi .I have problem with this back to back timer configuration . (in AN4776)What I get :1- Timer 1 is making PWM ( i just need a regular pwm but this examle is a complementary one )2-Timer 1 will send a trigger to timer2( which is it's controller acut...
I am slightly confused with the ADC Master - Slave configuration. Maybe someone can shed a bit of light in here.Using a STM32G474RET (LQFP64), thinking of chaining ADC1 and 2 in a master/slave configuration. Looking at the attached schematic, PB1 and...
Hello,I'm using a Nucleo F446ZE to test timer capabilities to make a peak-and-hold PWM driver. I already have the core functionality where TIM1 uses DMA to run through a buffer of variable duty cycles at a higher frequency (e.g. 5 kHz) for the high-s...
Please help if you can, but please do me the courtesy of reading in full before replying: We have a product using STM32L475 with a 32768Hz clock on the LSE. When I attempt to tune the crystal oscillator to within the performance spec of the crystal ....
In the document UM1775 there is stated the following:"5 V and 3 V can be used as output power supplies when an extension board isconnected to pins P2 and P3....In this case, the 5V_O and 3V_O pins deliver a 5 V or 3.3 V power supply and thepower cons...
I'm using several Nucleo-H743ZI boards. At reset (reset handler) the bit ACTVOSRDY in PWR_CSR1 is 1 on one board and 0 on the other. 0 means "voltage level invalid, above or below current VOS". The current VOS is of course the default one at reset, i...
