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STM32L0x2 LSE CSS trigger

i'm using STM32L072,how to trigger the LSECSS interrupt?i've got HAL_RCCEx_EnableLSECSS(),HAL_RCCEx_EnableLSECSS_IT(), but the flag RCC_IT_LSECSS never set when LSE error comes up. plz give a clue or the flow of LSECSS

Staly.1 by Associate III
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Cannot output a single 100% duty PWM using DMA

Hello.I have been writing test code for motor control software.The problem is two 100% duty pulses generated when I give only one pulse.Could you tell me the cause and how to solve this problem?The test environment and code are as follows.[Test envir...

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THaya.2 by Associate
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Resolved! Hello everyone, I am trying to learn programming stm32f0 discovery board. But I dont want to use HAL or SPL or LL .Is there any way to leran programming stm32 with only using CMSIS ? I can't I find any tutorial or any book for this.

I use a makefile to build a project. And I can flash it eaisly all I need how to use CMSIS to write programs I blinked a LED with that way but I am stuck at that point. I need a book, document, course for that. And STM's programming Manuals are gibr...

SGüle.1 by Associate II
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STM32H753 writing to Flash

Hi , i am using STM32H753 MCU, it has 2 banks of 8 sector each using HAL_FLASH_PROGRAM function , it is not working, can anyone help me with this issue.int data;StartSectorAddress = 0x080E0000eg:(HAL_FLASH_Program(FLASH_TYPEPROGRAM_FLASHWORD, StartSe...

MKS by Associate II
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data retention

i am using stm32h743zt6 controller, what is meant by data retention in flash memory?where this parameter?how we can calculate this?Thanks,

Tkuma.1 by Associate II
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Hi, I am new to the STM32. The function SystemCoreClockUpdate() in the library file system_stm32f10x.c extracts the PLL multipl. factor PLLMUL[3:0] from the RCC_CFGR register. Question: why the '+2' here: pllmull = ( pllmull >> 18) + 2;

void SystemCoreClockUpdate (void){  uint32_t tmp = 0, pllmull = 0, pllsource = 0;  /* Get SYSCLK source -------------------------------------------------------*/  tmp = RCC->CFGR & RCC_CFGR_SWS;    switch (tmp)  {    case 0x00:  /* HSI used as system...

Kmax18 by Senior II
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