Resolved! STM32U073 - wrong documentation for clock frequency
* In the reference manual RM0503 rev2, in §5.4.4 (description of RCC_PLLCFGR), the description of PLLR[2:0] indicates:Caution: The software must set this bitfield so as not to exceed 54 MHz on this clock.* In the reference manual RM0503 rev2, in §5.2...