2025-02-17 08:29 AM
I am evaluating NAND Flash as a means of storage for a product. I am using the Toshiba TC58NVG1S3HTA00 and using it with the FMC on the NUCLEO-U575ZI-Q board. While I have established comms and have been able to read, write and erase the flash chip successfully, the average read access time is 8 times slow than expected, and the issue seems to be on the FMC side, which is not raising the NOE pin fast enough for expected. Any help would be appreciated.
Some key information:
FMC Initialisation code:
static void MX_FMC_Init(int WaitEnable)
{
/* USER CODE BEGIN FMC_Init 0 */
/* USER CODE END FMC_Init 0 */
FMC_NAND_PCC_TimingTypeDef ComSpaceTiming = {0};
FMC_NAND_PCC_TimingTypeDef AttSpaceTiming = {0};
/* USER CODE BEGIN FMC_Init 1 */
/* USER CODE END FMC_Init 1 */
/** Perform the NAND1 memory initialization sequence
*/
hnand1.Instance = FMC_NAND_DEVICE;
/* hnand1.Init */
hnand1.Init.NandBank = FMC_NAND_BANK3;
if(WaitEnable)
hnand1.Init.Waitfeature = FMC_NAND_WAIT_FEATURE_ENABLE;
else
hnand1.Init.Waitfeature = FMC_NAND_WAIT_FEATURE_DISABLE;
hnand1.Init.MemoryDataWidth = FMC_NAND_MEM_BUS_WIDTH_8;
hnand1.Init.EccComputation = FMC_NAND_ECC_DISABLE;
//hnand1.Init.ECCPageSize = FMC_NAND_ECC_PAGE_SIZE_512BYTE;
hnand1.Init.TCLRSetupTime = 0;
hnand1.Init.TARSetupTime = 0;
/* hnand1.Config */
hnand1.Config.PageSize = 0x800;
hnand1.Config.SpareAreaSize = 0x80;
hnand1.Config.BlockSize = 0x40;
hnand1.Config.BlockNbr = 0x800;
hnand1.Config.PlaneNbr = 0;
hnand1.Config.PlaneSize = 0;
hnand1.Config.ExtraCommandEnable = DISABLE;
/* ComSpaceTiming */
ComSpaceTiming.SetupTime = 1;
ComSpaceTiming.WaitSetupTime = 3;
ComSpaceTiming.HoldSetupTime = 1;
ComSpaceTiming.HiZSetupTime = 1;
/* AttSpaceTiming */
AttSpaceTiming.SetupTime = 1;
AttSpaceTiming.WaitSetupTime = 3;
AttSpaceTiming.HoldSetupTime = 1;
AttSpaceTiming.HiZSetupTime = 1;
if (HAL_NAND_Init(&hnand1, &ComSpaceTiming, &AttSpaceTiming) != HAL_OK)
{
Error_Handler( );
}
/* USER CODE BEGIN FMC_Init 2 */
/* USER CODE END FMC_Init 2 */
}
FMC NAND SFRs in STM32IDE:
Logic Analyser on read transactions:
Logic Analyser display of 2 2k Page reads from NAND Flash chip
Zoomed in NAND Flash read, showing 200 ns in between reads