Ask questions, find answers, and share insights on STM32 products and their technical features.
I'm running a STM32L073 to generate a sine wave tone via I2S in normal DMA mode. The amplifier is a MAX98357A. The MODE pin is connected to VDD so only left channel is considered. I2S runs at 48kHz and the uC clock source is internal. The output tone...
Hi all, I am using register mode SPI for communication purposes, clock is 210Mhzinterrupt is for every 4khzinitialized SPI with HAL formatSPI data rate: 35MBpswhen I send data through SPI I can find some jitter inside it. But when I drive the same si...
I am trying to transmit through SPI to a MAX7219 chip on my STM32F412G-Discovery board. The system clock is running at 100 MHz. I am using a level shifter to handle the 3.3V -> 5V voltage changing. I have used this IC on an arduino so I do know it wo...
I am using an STM32G070RB nucleo 64 board with an ESP 8266, earlier I was using DMA to establish UART communication between the ESP and STM32, but now I have switched to UART interrupt mode to receive and transmit data. When I software reset the ESP ...
Hi, I have a simple code running on STM32L0 MCUs. I will need to change some data on their firmware on each board depending on some analog properties of another component.There is a practical way to program a portion of memory with some data after th...
I want to receive hex data from terminal like 0x66, 0x55, 0x44, 0x23, 0x11, 0xaa, 0xbb, 0xcc. Normally we can receive messages in string over UART. But I want to receive hex data instead of character or string from terminal. I am using stm32cubemx HA...
Dear ST community,What is my problem?I’m having a very hard time to get the I2S communication between a STM32H745IIT and a CS4272 audio ADC/DAC running. The STM is the I2S master, the CS4272 is the slave.What I am trying in the first place, is to sen...
After seeing the MOOC about the MPU Usage I am wondering about the speculative access reads. From the video it seemed, that they could occur to any random location unless that area was configured as strongly ordered or device memory. What about the a...
I have set up my FLASH_ACR to disable all caches or prefetch options, but with 5 WAIT_CYCLES. My goal is to predict when the read operations happen and how long they take in processor cycles. I provided some example code below, but my goal is to get ...
