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Forum Posts

Why SDRAM1 and SDRAM2 have the same pins

Hello,can someone please help me,why do when i use SDRAM1 and then add SDRAM2 the data and address pins are the same but only the chip enalbe. does this mean that all pins even the Data pins DQ can be connected parallel for both chips? have someone a...

Resolved! How do Signed 24 bit values work

Hi. I'm having trouble with integer interpretation for DFSDM. From the RM:> The offset correction allows to calibrate the external sigma-delta modulator offset error. The user configures the offset register with a signed 24-bit correction, and this r...

DOCon.1 by Senior
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  • 5 replies
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Resolved! STM32HT43 Nucleo 144

Hello All,I have an intresting issue that came up. But I am not sure if I understand it. In the clock configurator, I gave the usart mux a 100Mhz clock for the uarts and set up the baud rate for 115200K. Once I started sending data, I noticed that...

IAgui by Associate III
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  • 7 replies
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Resolved! STM32F4 parallel input using HAL and DMA [SOLVED]

I have a very basic 8-bit parallel line on pins PC0-PC7 with its clock on PB6. The MCU is a 411RE, I'm using STM32CubeIDE and HAL libraries.I've read AN4666 but the examples provided are written using an obsolete library, not HAL. But I understood th...

LOliv.2 by Associate II
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  • 13 replies
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Transmit more than 8 array elements via Standard CAN - STM32F4

Hi guys,I'm currently working with Standard CAN. The maximum data length of each frame is 64 bytes. In HAL library, I see DLC parameter is limited from 0 to 8. So that means, I can only transmit 8 elements of an array (8 bytes for each element). In o...

QTLe by Associate
  • 559 Views
  • 2 replies
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Synchronizing code with ADCCLK in STM32F746

My goal is to start ADC conversions a deterministic amount of time after raising a GPIO.Since the ADC clock is slower than the instruction clock, the instruction to set SWSTART can occur in between ADC clock cycles. I currently have the ADC clock set...

RBack.1 by Senior
  • 1329 Views
  • 12 replies
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