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ADC sampling time measurement

I have a reading problem with dmaWhen reading multi channel with ADC dma I need to know when to sample each channel. In the ADC input, I found a 2us transient in the oscilloscope output below. I considered this transient as adc sampling time and adju...

0693W00000NpU8EQAV.png

HAL SMBUS on STM32L071xxx, how to set up correctly

I configured I2C SMBUS in cubemx and reimplement HAL_SMBUS_MasterTxCpltCallback, then I called MX_I2C1_SMBUS_Init() and HAL_SMBUS_Master_Transmit_IT(). After that i had no any events: not called callback and no any data transmited. In fact on sda and...

0693W00000NpRaUQAV.png
ANaum.1 by Associate II
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I am trying to setup DMA with ADC on stm32h747 even thoug conversion end DMA transfer never completes. The ADC's conversions are triggered by a timer (this part of the code works fine) and the DMA is supposed to write the data to memory.

Here is how I setup my DMA ; Enable Clock for DMA1Periph to memoryset memory and periph size to half wordset memory address increment and clear periph address incrementset circular modegive the flow control to the ADCSet DMAMUXSet DMA periph addressE...

HTess.1 by Associate III
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Sync DMA request every 72 bytes based on GPIO signal

I have an SPI peripheral that generates an external signal (EXTI) when a data record is ready. The data is then read over SPI by the MCU. The data record is 72 bytes.Right now I have an interrupt handler that starts the DMA process to read the next r...

DanF by Associate II
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Resolved! STM32F301 SPI read FIFO flush does not seem to work

STM32F301R8T6(Master)M95160-WMN6TP EEPROM(Slave)Low Level driversI've been trying to do a basic SPI EEPROM test based on the STM32F30x_DSP_StdPeriph_Lib_V1.2.3 SPI EEPROM example. Have finally gotten the write to work correctly but when we begin the ...

Resolved! DMAMUX Synchronization events (stm32h747)

The DMAMUX1 can trigger DMA requests through synchronization and within the tab of synchronization possibilities there is TIM12_TRGO (input 7). So here is my question do the bits MMS[2:0] in register TIM12_CR2 configure this TRGO (it is written that ...

HTess.1 by Associate III
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