STM32 MCUs Products

I've recently started to try and integrate PN532 NFC/RFID module with the STM32F469I-disco. I had tried to use a few libraries from git but no luck in making them work. As a fresh coder and embedded engineer, any leads or advice on how I can do this? Thx!

Unable to get a proper display on TFT screen interfaced with NUCLEO-F401RE board.

Hello everyone.. After a lot of efforts, I found a working library for 3.2" TFT color LCD display with ILI9341 driver (240x320) which I am interfacing with my Nucleo F401RE development board. I just tried writing a simple "Hello World" code after fil...

how put UART DMA IN RAM?

What exactly happens when the Main flash memory (User application code) is selected as the boot area?

I've gone through the STM32 boot processhttps://community.st.com/s/article/faq-stm32-boot-processAfter the boot mode configuration is resolved by means of the BOOT0/BOOT1 pins or the nBOOT0/nBOOT1 (from the option bytes); the controller chooses the s...

Send COMP output to 2 TIMs as follower and inverter.

I want to generate differential signal from this MCU itself. I'm using NUCLEO-H723ZG doing this which has DAC, COMP and TIM built-in.I've used 2 DAC for generate 2 simultaneous UART signals (If there's other ways to do this please recommend) but it's...

How to send another START bit during an I2C transmission

Hi,I am trying to set the FRAM memory mb85rc64ta in sleep mode (Datasheet: I cannot copy and paste a link, but it is from Fujitsu and the pdf file is called MB85RC64TA-DS501-00044-4v1-E page 11)It requires 2 START condition but no STOP condition befo...

How do you use DMA transfers on DAC2 (not DAC1 Channel 2) on a STMH7A? Looking at the memory block diagram it seems that bdma2 has limited scope (does it only have access to the SRD Ram of 32k?) Even if this is the case 32k would be fine... How?

how can we send binary data on two different pins simultaneously on both the rising edge and falling edge of dclk whose speed can be 1MHz on stm32f4?

PCA is managed by a full-duplex serial interface. A typical data frame is defined bya burst of 8 DCLK pulses followed by an assertion of a DLOAD pulse (these lines are driven by the host printing system.). During each frame, 32 bits of control or pri...