STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...
The new STM32H7R/S lines are built on the success of the STM32H7 series, offering even higher performance and security at a lower cost. The STM32H7R/S is a bootflash-based MCU powered by a Cortex®-M7 core running up to 600 MHz, with 64 KB of user fla...
i have connected the tx pin to rx pin on fbcan3 interfaceyou will find my project in attacheementthanks
Hello, I have a timer 3 master and timer 1 slave. When a button is pressed, master is activated as long as button is pressed, and then slave is triggered based on master's output signal (high / low) (gated slave control)(This is a continuation of my...
I want to make an interrupt when power > 2.0V. STM32CubeIDE generated:/** * @brief NVIC Configuration. * @retval None */ static void MX_NVIC_Init(void) { /* PVD_IRQn interrupt configuration */ HAL_NVIC_SetPriority(PVD_IRQn, 8, 0); HAL_NVI...
I'm working on a STM32MP1xx board and I'm useing only the Cortex-M4 for this UART configuration.
I'm using the STM32L431xx mcu. The current hardware configuration of our design has no external clock source (crystal), so we are using the internal one. And there's a new functionality which demands second-accurate real time clock, over a period of...
Has anyone have similiar issues ? I got I2C DMA writes working nicely on table, but in real application there are disturbances which cause false start condition on the bus.This happen when I2C HAL driver has "lock" on I2C handle - so incoming interr...
Hi,please find the attached register values of WWDG register on Reset positionRegards,Sudheer
I'm trying to count the number transition during the time another process is taking place. Don't need frequency, just the counts.So I've enabled TIM8CH3 for capture-compare, and have verified that CCR3 does change when there are transitions on th...
I was looking at the ARM M7 reference manual, and it shows an empty NVIC ISR vector from 0x40 to 0x3fc. When I look at the file startup_stm32h725xx.s it defines specific interrupts mapped to the ISR vector. Are these hard mapped by the EXTI block an...
I have the STM32H7B3I-DK (MCU: STM32H7B3LIH6Q), and I am trying to get the sys_ck close to its maximum frequency of 280 MHz, by running HSI or HSE through PLL. The trouble is that I can only get up to 164 MHz. Any higher and I get a hard fault. Is th...