Hi all,I have a CAN 2.0 network up and running with a F407 and some F103. I added a board with a G0B (fdcan). I couldn't get my hands on a FDCAN-tranceiver. I tried to get it working in classic mode (from repository example) with a CAN2.0 tranceiver....
I have to implement a lifetime counter with microseconds granularity using a STM32L432KC to control an AFBR-S50 sensor. The timer has to count "forever" and this board only has 1 32bit timer, so this timer is for the seconds, i think is the only way...
I would like to build an application on an STM32 microcontroller (the one integrated in the NUCLEO-L432KC) that allows to transmit a message of 192 bytes or more if possible on CAN BUS.At first, I was thinking of a mechanism that in the transmission ...
Hi everyone!In my project, I use TIM2, TIM3, TIM4, TIM5, in each Timer module I choose PWM Input on CH1, and PWM Generation on CH3 function. My goal is to generate PWM pulse at channel 3 and feed back to PWM Input on CH1 to measure Duty cycle and fre...
I've come across the following code in system_stm32h7xx.c, present in all example projects in STM32CubeH7 FMC_Bank5_6_R->SDCMR = 0x00000009; tmpreg = FMC_Bank5_6_R->SDSR & 0x00000020; while((tmpreg != 0) && (timeout-- > 0)) { tmpreg = FM...
Hi,I am using 4 ADC channel to read MIC circuit with STM32G030C8T6I am using ADC interrupt service to read ADCsI set ADC as follow:Clock Prescaler: Async clock mode divided by 32 Scan conversion Mode: enableContinuous conversion mode: enableADC_regul...
On the STM32F401RE, I'm trying to get a compare match on CC4 on TIM1 to trigger an ADC conversion in injected mode, but the ADC is never seeing the trigger.How do I set TIM1 to generate the TIM1_CH4 trigger on a compare match on CC4?TIM1->CR2 has an ...
Im using a stm32f105RBT6 and i am in need a ton of softpwm pins.My solution (with the help of @Community member ) was to run 4 DMA channels triggered by 4 different timers addressing 4 different GPIO ports (in a circular mode).This worked like a cha...
Here's my issue: in converting an STM32L072 QFN32 to BGA49 I routed the NRST line across the PH0 & PH1 balls to avoid using via-in-pads. However, it appears that in a virgin part HSE is enabled by default and OSC_OUT is pulling the NRST line low, whi...
