Where single stepping with STM32H7 code works?
Some ARM/STM32H7 CPUs have a problem with single stepping through code. Which CPUs didn't have this problem? I have planned to use STM32H750 because it is now somewhat available, but I could swap.
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I have designed a custom stm32f407vgt6 board with on board stlink, similar to stm32discovery board. But the st-link after assembling, the st link is not being detected by any application. Please let me know how to solve the issue.
I have tested all 3v connections going into the st-link chip, but the bi-color led is not blinking when it is connected via USB. Please help.
Resolved! CubeIDE --- How to change .ioc file to update another file??
Good morning.....I have a CubeIDE prj with .ioc and main. All compiles fine. I have created a second file with a main function (gfsk.c). I have excluded the original main.c for build. I would like to know when I go back into the .ioc to make a sm...
Stm32f103c8t6 RTC Crystal Choice
Hi, I'm trying to do embedded 103c8t6, and I'm having some trouble with selecting the right crystal.Here is my Schematic. I'm using ABS07-32.768khz with 12.5pF load Capacitances and the equivalent series resistance is 70kR. I took Cstray as 5pF that'...
Resolved! Older STM32H743ZI MCU Nucleo board was updated to V3.J10.M1 firmware version. While The board can be flashed, it isn't possible to debug or erase chip memory. Is there a way to roll back the update?
After running into some issues during an OS migration, I ran a firmware update on a nucelo_h743zi board using the stLink utility. After this I ran into many issues with flashing and debugging. While I can flash the board with openocd v11, it has some...
STM32U575: is it possible to disable blocking the read and write accesses to the backup registers, backup SRAM and SRAM2 when the tamper flag is set? To use tamper input for information and not security purpose.
According to RM: "In the NOERASE configuration (TAMPxNOER=1 in the TAMP_CR2 register, ITAMPxNOER=1 in the TAMP_CR3 register), the backup registers and other device secrets are not erased when the corresponding tamper event is detected. In addition, t...
DMA request generation from Software STM32H750
I'm attempting to optimize the amount of instructions/time it takes to move data from CPU to GPIO. When doing ODR = X, I lose about 40ns, closer to 80 because I need to use 2 ODR writes to different ports and in general ODR output seems to sit at abo...
STM32L4 ADC Oversampling period
I am planning to use STM32L4 hardware oversampling by a factor of 2. With the current setup (without oversampling), I am triggering ADC capture and conversion using Timer update event. The timer update event is generated at 10kHz and so the ADC is s...
