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Hi,I’m currently implementing I2C in slave mode using the STM32G491 series. Due to pin constraints, we’re considering using SCL and SDA pins from different GPIO ports—for example, SCL from port PA and SDA from port PC. Is it acceptable to assign I2C ...
Hi !I am evaluating the risks associated with STM32F3, where I am speculating a case where the voltage drops in VDD for few microseconds. For an example, let us assume the voltage drops from 3.3V to 3.0V for few microseconds. This occurs every x ms (...
Hello ST experts,I have bought a STM32H750IBT microcontroller. Could you please let me know how I can find whether it is V revision or Y revision device?
Recently i bought this STM32F103C8T6 Board along with ST Link V2 I was trying to upload a HEX(60KB) file using STlink software but i noticed something wierd, memory size in both pics is showing 256KB but this device only comes with 64KB flash memory ...
Hi all,I am Struggling with STM32L432 CAN Bus communication from one STM32L432 to another STM32L432 using MCP2551.* I have checked loopback works.*I am using HSE Clock (After soldering SB17) - * I have also tried putting Oscilloscope at TX pins betw...
I'm trying to find the best approach to accomplish the following: Read audio samples from a digital microphone using the ADF1 peripheral and use the LPDMA controller to store those samples in a SRAM4 buffer. An interrupt or event should occur when th...
I am designing a board with an STM32H725ZGT3. I would like to multiplex external Flash and RAM on the same Octospi bus and use the external flash as execute in place memory. Is this a supported configuration?
I have been trying to configure Nucleo STM32F401RE board as an I2C Slave and Xavier Nx as Master but it is throwing me BUSERR.I am adding some the main.c file below to explain my configurationmain.c/* USER CODE BEGIN Header */ /** *******************...
I am working with the STM32H7A3ZI microcontroller and planning to integrate an external flash memory to run application code. The flash memory I intend to use supports both standard SPI and QSPI interfaces.I would like to confirm the following:Are th...
When Pb4 is reset, it is at a high level. Can't this be configured in the hardware? It's too disgusting. The PCB has been designed and encountered this pit.
