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I need clarification regarding the correct pinout for the specific part number I am designing with: STM32H7R7A8I6.I've noticed a discrepancy between the datasheet and the STM32CubeMX tool:Datasheet: The document shows two options for the UFBGA169 pac...
Hello ST Experts,I am using an STM32H755ZIT6 with W25Q256JV flash in Quad-SPI mode at 100 MHz.On our latest hardware revision, we observe occasional QSPI read failures and flash communication instability.During analysis we found:1. QSPI signal oversh...
I am using STM32U083 MCU in a project that runs on a 3.6v Li-SOCL2 lithium thionyl chloride battery (OC voltage 3.65V / Nominal voltage at 1mA 3.6V).Currently I have used a LDO of 2.5v to power the MCU, but I was thinking if we can eliminate the LDO ...
So i'm following along with this video* https://www.youtube.com/watch?v=usQ_f6Swpok&list=PLTJzs51NlEICI7ARAHOyUqMhTgJE0UFv0&index=5 I have the same* STM32N6-DK board This is my build command for the GPIO_IO_Toggle application.* /opt/st/stm32cubeide_1...
There is this errata for STM32G0B12.2.10 Prefetch failure when branching across flash memory banksDescriptionIn rare cases, the code prefetch may fail upon branching and function calls across flash memory banks,regardless of the DUAL_BANK and nSWAP_B...
Hey!I will explain my setup and then paste the code. I have three different timers (TIM1, TIM2, TIM3) sending out PWMs to different parts of my board. All timers are set up the same way; the only difference is that TIM1 is an advanced timer.What I do...
I want to make a project on stm32f103, I write some code. When I want to add sd card support, I need to use spi interrrupt enable.But after I enable the global irq then the code is hang. Besides I debug the code with gdb, then I do ctrl + c , then I ...
I have a situation where a USB endpoint stops working due to a control packet being NAKed in the handshake phase. I've traced the problem down to the STM USB stack setting DCTL.SGONAK = 1 in response to an INCOMPISOOUT event, yet in the case when it ...
Hello,I am implementing SPI master communication on an STM32G474RE, transferring 68 bytes per transaction. However, I am unable to achieve the desired SPI clock speed of 5 MHz—currently the SPI clock only reaches approximately 3 MHz.The system clock ...
On a stm32u5, the SPI3 is in the SmartRun domain, which is designed to work down to STOP2 in autonomous peripheral mode with LPDMA. I'm now wondering if it is also possible to use SPI3 in autonomous mode with GPDMA but only to STOP1? Or do I need to ...
