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Hello everyone,this is my first time building an STM32 Based Board myself.I am trying to talk to the Chip Using a CP2102 UART Bridge connected to PA9 & 10.For Reset and Boot 0 ive connected Reset (NRST) to RTS of the UART Bridge and Boot0 to its GPIO...
Hi everybody.I'm currently trying to use the N6 Nucleo for a personal application but am having trouble starting the debugger after initially successes. I am using the Nx_TCP_Echo_Server example, and after a couple of successful iterations my debugge...
Hello, in an earlier post it was suggested to reset the FDCAN for full error recovery using RCC_APBRSTR1.FDCANRST Bit This bit seems to be global for all FDCAN instances. Is it correct that full error recovery in one FDCAN instance is not possible ...
Hello all, Split from this thread: I'm using an STM32U5G9 and I need to read files from a USB stick. I don't want to use ThreadX because I have to keep this application small. How can I achieve this if UsbX and FileX are supposed to be used only wi...
Hi I have setup a small project in CubeMX v6.17.0 with FSBL and an application (secure domain only). As long as I use the default Flash and RAM region, debugging works fine. ROM (xrw) : ORIGIN = 0x34000400, LENGTH = 511K RAM (xrw) :...
Hi,I am working with a custom board using an STM32N657X0H3Q and cannot for the life of me bring about a reset via the NRST pin.I have tried applying the workarounds from errata sheet ES0620 - Rev 3, sections 2.2.19 and 2.2.23, but my device still jus...
Can anyone explain this footer note in the electirical characteristics sheet for the STM32F777xx STM32F778AxSTM32F779xx. on page 110.2. 216 MHz maximum frequency for 6 suffix version (200 MHz maximum frequency for 7 suffix version). I am using the ST...
Hello everyone,I am working on my bachelor thesis about sensorless Field-Oriented Control (FOC) for a three-phase BLDC motor.At the moment, I have a NUCLEO-F303RE board, a small BLDC motor, an ESC, and a power supply. I have already generated and mea...
Hello, In the reference manual rm0481 (stm32h562) in chapters 7.11.38 and 7.11.51 it is stated that EDATAx_STRT Bits do not have any hardware effect. Can I assume that the corresponding bits in FLASH_EDATAxR_CUR are set from option bits only? In that...
Hello,I am working on a project where I need to both read and write regularly into the STM32 flash memory. I have some concerns and questions regarding its endurance.First off, I posted a question not long ago about writing to FLASH using ST EEPROM l...
