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I'm using STM32F429I-DISCO with external SDRAM and DMA2D to render graphics.CPU run at 180 MhzSdram 90mhzLtdc clock: 3mhzLcd : 240*320 color RGB565Issue:I use DMA2D to fill the screen, then on Transfer Complete interrupt, I trigger a second DMA2D to ...
Hi,I have a question regarding the backup SRAM in the STM32U5. The reference manual is not clear about this:On the one had, it mentions the following Which seems to indicate that it is possible to place the device in standby without powering SRAM2. H...
Hello,When using stop mode 3 with the stm32u5a9j chip, I noticed a unexpected behaviour when exiting stop mode 3.I have a device connected to the stm32 chip which wakes up the stm32 on rising edge on one of its pin ( GPIOA0 ). This interrupt can be t...
Hi, I'm using the STM32H753-NUCLEO Board for some SW development, and I'm having some issues with the SPI Handling.I'm attempting to transmit a single 16-bit data packet, however on the scope I'm transmitting two 16-bit data packets. When I change my...
HiI created a composite USB device with CDC and UVC classes using usbd. The device is detected, camera image streaming works, and data transfer via CDC (virtual serial port) also works. However, after a random time, communication on the CDC data out ...
I am using two NUCLEO-U385RG-Q boards for I3C communication — one configured as the Controller (Master) and the other as the Target (Slave). I am trying to implement an IBI event with Pending Read Notification, and would like to know whether it is po...
Hi everyone! I have a working project based on STM32F746 with LCD, Ethernet and SDRAM(IS42S16160J-6TL) and now we are moving it to STM32H753II. I set up a FMC controller and tested whole SDRAM region with 8, 16, and 32 bit access. I use GCC. During t...
Hello everyone, I am working with an STM32H753ZI board and I want to set up CAN communication. I’m a bit confused about what changes I need to make. Here are my main questions: Does the STM32H753ZI use the regular CAN peripheral or the newer FDCAN p...
Hello, I am working with an NUCLEO-H753ZI (ADC1/ADC2 with DMA1/DMA2, and ADC3 with BDMA).My goal is to store ADC conversion results directly into a uint32_t buffer using DMA, so that the 16 valid bits from the ADC are automatically ...
Akkording to AN3155, July 2025: "The highest tested baud rate (BHigh) is 115200." Have tried with 921600 and that seems to work fine. Is the recommodation from ST that not use above 115200?
