Why Fast_Read need a Dummy Byte?
Posted on August 23, 2011 at 02:50hi!While reading flash or some other in Fast_Read mode, we have to send a DUMMY Byte in order to receive Results? Why it is required? I'm waiting for your reply...
Ask questions, find answers, and share insights on STM32 products and their technical features.
Posted on August 23, 2011 at 02:50hi!While reading flash or some other in Fast_Read mode, we have to send a DUMMY Byte in order to receive Results? Why it is required? I'm waiting for your reply...
Posted on July 27, 2011 at 18:24HelloI want to use some USB examples (especially joystick) from ST (um0424.zip), I can compile it, but I am not sure about evaluation board type.I using http://cgi.ebay.com/STM32F103RBT6-ARM-Cortex-M3-mini-Development...
Posted on August 20, 2011 at 15:49New Source uCOS-III porting for STM32F2xx http://sourceforge.net/projects/ucosiiistm32f2/
Posted on August 18, 2011 at 15:58Hi All,Is there a way to disable the Write buffer on STM32F103xxx.The Cortex M3 reference manual talks about ''Auxiliary Control Register'' which can be used to disable write buffer. Which will turn all imprecise bu...
Posted on August 19, 2011 at 07:52Hi Guys, I'm working on Usart programming in IAR environment. But I got a problem. The USART interrupt handler seemed not to be called. Here's my code:void initUART2(){ USART_InitTypeDef uart2Init; USART_ClockI...
Posted on August 17, 2011 at 04:27Hello there, i am having problems setting up USART3 on my STM32f103c8t6 chip. there seems to be nothing wrong with the code, but the tx pin does not seem to be functioning at all.I have tried my code on a STM32f103r...
Posted on August 18, 2011 at 07:34use API set the RDP to Level_2 : if ((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) != (uint8_t)OB_RDP_Level_2)) { FLASH_OB_Unlock(); FLASH_OB_RDPConfig(OB_RDP_Level_2); FLASH_OB_Lock(); } and read value from OP...
Posted on August 15, 2011 at 13:32Hi, I'm trying to implement USB mass storage and mass storage bootloader on STM32F103RBT but ... I have a problem with the adapted the code from STM32_USB-FS-Device_Lib_V3.3.0 Mass_Storage example. The ISTR_RESET in...
Posted on November 23, 2010 at 10:37using threads under uclinux #stm32 #arm-thumb-stm32-cortex-m3 #stm-32 #stm32f103-uclinux
Posted on August 01, 2011 at 10:17Please could someone post the details to manage the SPI NSS signal? I want to use the SPI as a full-duplex master (sending and receiving data simultaneously). I have read many posts about the NSS deficiencies in the...